CDS&E - ECCS: Plane-wave Electronic TRAnsport (PETRA)

各种各样的消费电子产品，如笔记本电脑和智能手机，都依赖于微小的纳米尺寸的电子开关。为了进一步改进和开发制造成本更低、功耗更低的新型电子开关，已经提出了基于新型二维材料而不是传统硅技术的新器件概念，需要进行新的研究来评估其潜在特性。开发这种新型电子开关的一个重要步骤是计算机模拟包含控制电荷传输的物理元素。在电子输运模拟中已经实现了许多重要的突破，量子输运通常使用社区可用的大量工具进行模拟。然而，所有这些目前可用的工具都是从化学家的“紧密结合”观点出发，而不是从物理学家的“平面波”观点出发。不幸的是，某些在二维材料中很重要的物理过程很难用紧密结合的基础来正确地处理。这个项目的目标是改变量子输运的研究方式，从紧密结合的基转移到平面波基。本计划将开发一种基于平面波的量子传输码，能够研究新型电子设备。该项目还将包括研究传统规模的电子设备以及新提出的设备和材料，这些设备和材料为实现更节能的电子设备提供了重要途径。该项目还将通过参加德克萨斯大学达拉斯分校的各种推广项目，培养一批有动力在大学学习科学和工程的学生。具体来说，该项目将开发一种基于平面波的代码，能够研究纳米级设备（如纳米线和纳米带）中的量子传输。代码将实现有效的平面波算法，以减少计算内存和时间要求，并具有研究自旋轨道耦合影响的强大能力。电子耗散散射在这些纳米级器件将处理使用泡利主方程。将被纳入的重要物理现象有：声子散射、缺陷和边缘粗糙度。特别令人感兴趣的是弯曲面外声子的散射，这种声子很难在局部基集中描述。在这些低维系统中，原子尺度的介电响应也将被研究。利用开发的量子输运码，将研究各种各样的器件，如传统场效应晶体管、基于隧道的场效应晶体管和拓扑绝缘体场效应晶体管。本研究将阐明弯曲面外声子模式对低维材料电子输运特性的影响。将确定自旋轨道耦合对输运的影响。将阐明自旋轨道耦合和电子-声子相互作用之间的相互作用如何影响输运。最后，该研究还将揭示未来场效应晶体管的重要物理过程，并确定如何处理可能的有害影响，如线边缘粗糙度。

A great variety of consumer electronics, such as laptops and smartphones, rely on tiny nanometer-size electronic switches. To further improve and develop new electronic switches that can be manufactured more cheaply and consume less power, new device concepts based on novel two-dimensional materials rather than conventional silicon technologies have been proposed and new research is needed to assess their potential properties. An important step in the development of such new electronic switches is computer simulations incorporating the physical elements that control the charge transport. Many important breakthroughs have been realized in electronic transport simulations and quantum transport is routinely simulated using a host of tools available to the community. However, all of these currently available tools start from the chemist's "tight-binding" viewpoint rather than from the physicist's "plane-wave" vantage point. Unfortunately, certain physical processes that are important in two-dimensional materials are difficult to be treated correctly using the tight-binding basis. The goal of this project is to transform the way quantum transport is studied by moving from the tight-binding basis to the plane-wave basis. This project will develop a plane-wave based quantum transport code capable of studying novel electronic devices. The project will also include a study of conventionally-scaled electronic devices as well as newly proposed devices and materials that present important routes toward the realization of a more energy-efficient electronics. This project will also generate a pipeline of students motivated to study science and engineering at universities through participation in various outreach programs at the University of Texas at Dallas. Specifically, the project will develop a plane-wave based code capable of studying quantum transport in nanoscale devices such as nanowires and nanoribbons. Efficient plane-wave algorithms to reduce computational memory and time requirements and a robust capability of studying the effects of spin-orbit coupling will be implemented in the code. Electronic dissipative scattering in these nanoscale devices will be dealt with using the Pauli Master equation. Important physical phenomena that will be incorporated are: scattering with phonons, defects, and edge roughness. Of particular interest is scattering with the flexural out-of-plane phonons which are hard to describe in a localized basis set. The atomic-scale dielectric response in these low-dimensional systems will also be studied. Using the developed quantum transport code, a wide variety of devices, such as conventional field-effect transistors, tunneling-based field-effect transistors, and topological-insulator field-effect transistors, will be studied. The research will elucidate the impact of flexural out-of-plane phonon modes on the electronic-transport characteristics of low-dimensional materials. The effects of spin-orbit coupling on transport will be determined. How the interplay between spin-orbit coupling and the electron-phonon interaction affects transport will be clarified. Finally, the research will also unravel the important physical processes in future field-effect transistors and determine how to deal with possible detrimental effects such as line-edge roughness.