课题基金 / 基金详情

SPX: CISIT: Computing In Situ and In Memory for Hierarchical Numerical Algorithms

SPX: CISIT: Computing In Situ and In Memory for Hierarchical Numerical Algorithms
SPX:CISIT:分层数值算法的原位和内存计算
批准号:
1725743
负责人:
George Biros
金额:
$80.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2017
资助国家:
美国
项目状态:
已结题
起止时间:
2017-10-01 至 2020-09-30

项目摘要

项目成果

George Biros的其他基金

相关文献

中文摘要
翻译
高性能计算通过建模和仿真、统计推断和人工智能为科学、技术和日常生活带来了巨大的变革。 尽管在软件和硬件技术方面取得了许多成功,但能源效率障碍已成为更强大计算机的主要障碍--从移动的设备一直到超级计算机。计算机的存储器子系统和中央处理单元(CPU)之间原本自然的分离已经成为能源效率低下的主要原因之一。内存和CPU之间的数据移动需要比计算本身多几个数量级的能量。为了应对这些挑战,本项目将考虑新颖的架构设计范例和算法,旨在模糊分离的内存和计算子系统之间的传统界限,并通过将计算直接分布在内存中或作为内存数据传输的一部分来执行,实现能源效率和性能的数量级增益。该项目将在计算数学中的一类方法的背景下研究这种新颖的方法,这些方法出现在计算科学,大规模数据分析和机器学习中的许多问题的核心。具体来说,该项目将专注于数据驱动而不是计算驱动的算法和架构的协同设计,用于构建,近似和分解分层矩阵。该项目的最终目标是设计一种新的架构,即CISIT(用于“计算原位和在途”),其具体目标是在分层矩阵的背景下加速计算和数据移动。CISIT将独特地将联合收割机传统的通用CPU和GPU核心与以下各项结合起来:(1)使用定制硬件加速核心算法原语;(2)原位计算能力,包括在主存储器中或附近进行处理,以及在芯片上高速缓存和靠近核心的存储器内进行计算;(3)小说─传输计算能力,这将能够减少,并在许多情况下完全消除不必要的往返数据传输,因为它是透明地处理数据之间的主要传输存储器和本地计算核心。一旦成功,CISIT将影响未来的架构实现。 沿着研究活动,将设计一个教育和传播方案,向学生和研究人员以及更广泛的计算和应用科学家受众传达这项工作的结果。
英文摘要
High performance computing holds an enormous promise for revolutionizing science, technology, and everyday life through modeling and simulation, statistical inference, and artificial intelligence. Despite the numerous successes in software and hardware technologies, energy efficiency barriers have become a major hurdle towards more powerful computers -- from mobile devices all the way to supercomputers. The originally natural separation between the memory subsystem and the central processing unit (CPU) of a computer has emerged as one the main reasons for energy inefficiency. Data movement between the memory and the CPU requires orders of magnitude more energy than the computations themselves. To address these challenges, this project will consider novel architectural design paradigms and algorithms that are aimed at blurring these traditional boundaries between separated memory and computation subsystems and, by distributing computations to be performed directly in the memory or as part of the memory data transfers, achieve order of magnitude gains inenergy efficiency and performance. This project will investigate such novel approaches in the context of a class of methods in computational mathematics, which appear at the core of many problems in computational science, large-scale data analytics, and machine learning.Specifically, this project will focus on data-driven rather than compute-driven co-design of algorithms and architectures for the construction, approximation, and factorization of hierarchical matrices. The end-goal of the project is the design of a novel architecture, CISIT (for ``Computing In Situ and In Transit''), that specifically aims to address acceleration of both computation and data movement in the context of hierarchical matrices. CISIT will uniquely combine traditional general-purpose CPU and GPU cores with: (1) acceleration of core algorithmic primitives using custom hardware; (2) in-situ computing capabilities that will comprise both processing in or near main memory as well as computing within on-chip caches and memory close to the cores; (3) novel in-transit compute capabilities that will enable cutting down on and in many cases completely eliminating unnecessary roundtrip data transfers by processing of data transparently as it is transferred between main memory and local compute cores across the cache hierarchies. Upon success, CISIT will influence future architectural implementations. Along with the research activities, an educational and dissemination program will be designed to communicate the results of this work to both students and researchers, as well as a more general audience of computational and application scientists.
期刊论文(15)
专著(0)
科研奖励(0)
会议论文
Off-Chip Congestion Management for GPU-based Non-Uniform Processing-in-Memory Networks
基于 GPU 的非均匀处理内存网络的片外拥塞管理
DOI: 10.1109/pdp50117.2020.00050
发表时间: 2020
期刊: and Network-Based Processing (PDP
影响因子: --
作者: [Punniyamurthy, Kishore, Gerstlauer, Andreas]
通讯作者: Gerstlauer, Andreas
Cacheline Utilization-Aware Link Traffic Compression for Modular GPUs
模块化 GPU 的缓存线利用率感知链路流量压缩
DOI: 10.1109/vlsid49098.2020.00041
发表时间: 2020
期刊: IEEE International Conference on VLSI Design and Embedded Systems (VLSID
影响因子: --
作者: [Punniyamurthy, Kishore, Das, Shomit, Gerstlauer, Andreas]
通讯作者: Gerstlauer, Andreas
DOI: 10.1137/18m1207818
发表时间: 2019
期刊: SIAM journal on scientific computing : a publication of the Society for Industrial and Applied Mathematics
影响因子: --
作者: [Mang A, Gholami A, Davatzikos C, Biros G]
通讯作者: Biros G
DOI: 10.1145/3205289.3205323
发表时间: 2018-06
期刊: Proceedings of the 2018 International Conference on Supercomputing
影响因子: --
作者: [Reena Panda;L. John]
通讯作者: Reena Panda;L. John
共 15 条
    CDS&E: AI-RHEO: Learning coarse-graining of complex fluids
    • 批准号:
      2204226
    • 项目类别:
      Standard Grant
    • 资助金额:
      $40.53万
    • 财政年份:
      2022
    • 负责人:
      George Biros
    • 依托单位:
    SHF: Small: Algorithms and Software for Scalable Kernel Methods
    • 批准号:
      1817048
    • 项目类别:
      Standard Grant
    • 资助金额:
      $47.62万
    • 财政年份:
      2018
    • 负责人:
      George Biros
    • 依托单位:
    XPS: DSD: A2MA - Algorithms and Architectures for Multiresolution Applications
    • 批准号:
      1337393
    • 项目类别:
      Standard Grant
    • 资助金额:
      $74.98万
    • 财政年份:
      2013
    • 负责人:
      George Biros
    • 依托单位:
    Collaborative Research: Petascale Algorithms for Particulate Flows
    • 批准号:
      1341290
    • 项目类别:
      Continuing Grant
    • 资助金额:
      $20.06万
    • 财政年份:
      2012
    • 负责人:
      George Biros
    • 依托单位: