Hardware-acceleration of Semantic Web databases with runtime reconfigurable FPGAs

近年来，语义网的相关性稳步增加。这可以通过越来越多的开发和使用语义Web工具和应用程序来证明。语义Web的主要思想是考虑符号的语义，以实现更精确的机器处理。为此目的，数据集之间的必要链接存储在数据库系统中。不断增加的数据集的大小导致传统的数据库，甚至专门的语义Web数据库的性能问题。在语义网数据库的范围内，有数十亿个条目的数据集是可用的，这些数据集的处理基于软件的解决方案是非常耗时的。因此，在这个项目中，硬件/软件系统将被调查和开发外包耗时的任务到一个可编程逻辑芯片（FPGA，现场可编程门阵列）。成本密集型任务的硬件加速将包括索引生成以及语义Web数据库中的查询处理。在查询处理期间，将在运行时决定哪个函数应映射到FPGA。由于数据路径到基本元素的映射使用部分运行时重新配置，因此可以为任何查询提供最佳硬件加速器。

The relevance of the Semantic Web has been increased steadily over the recent years. This can be shown by the increasing number of developed and used Semantic Web tools and applications.The main idea of the Semantic Web is to consider the semantic of symbols to enable a more precise machine processing. For this purpose, the necessary links between data sets are stored in database systems. The continuously increasing size of the data sets leads to performance issues for traditional databases and even specialized Semantic Web databases. In the scope of Semantic Web databases data sets with billions of entries are available and processing of these data sets on software-based solutions is highly time consuming.Thus, in this project a hardware/software system will be investigated and developed to outsource time consuming tasks to a programmable logic chip (FPGA, Field Programmable Gate Array). The hardware acceleration of cost intensive tasks will cover the index generation as well as query processing in Semantic Web databases. During query processing the determination of which function should be mapped to the FPGA will be decided at runtime. As the mapping of the data path to the basic elements uses partial runtime reconfiguration, an optimal hardware accelerator can be provided for any query.