CAREER: Designing Next-Generation Programmable Switches for Stateful In-Network Computing

有状态网络内计算（用户可以在网络数据平面中运行具有自定义状态的自定义程序）已被证明可以提高从网络到分布式系统到数据库到机器学习的各种关键应用程序的性能。不幸的是，有状态网内计算的支持技术（即可编程交换机）具有基本的设计限制，这些限制阻止它们扩展以满足当前和新兴网内应用不断增长的需求。特别地，当前一代的可编程交换机不能同时运行大量应用，不能存储状态密集型应用所需的大量状态，并且不能扩展到某些有状态应用的线速率处理。该项目将研究下一代可编程交换机的设计，该交换机可以同时运行大量应用程序，存储和处理大量状态，同时以多Tbps的线路速率运行，与当前的可编程开关相比，以仅名义上增加芯片面积和功耗为代价。2000年代初的网络处理器。然而，基于微处理器的网络处理器的处理架构和线路速率与当前可编程交换机相比的根本差异，为以全新的视角重新审视这些问题提供了机会。在这方面，该项目将进行三项关键创新。首先，该项目将研究跨多个并行交换机管道存储和访问共享状态的新方法，以实现有状态应用的线速处理。其次，该项目将研究以线速动态分配和共享交换机资源的方法，为每个应用提供一个“虚拟”可编程交换机的抽象，以便扩展到大量的应用。最后，该项目将研究最佳缓存设计（片上SRAM和片外DRAM之间），通过网络中相邻交换机之间的协调，在运行时可以看到未来的请求，以支持线速状态密集型应用。该项目还提出了几个教育和推广计划，将与拟议的研究紧密结合。作为该项目的一部分开发的系统和应用程序将被整合到普渡大学现有和新课程的课程中，包括非网络领域的课程，如分布式系统和计算机体系结构。该项目将在普渡大学举办为期一周的年度夏季研讨会，学校和即将到来的本科生属于历史上在计算机科学和工程中代表性不足的社区，鼓励他们追求科学和工程的职业生涯，给他们的实践经验，与国家的-作为该项目的一部分开发的艺术网络技术。该项目的所有结果和工件（包括源代码）将在URL www.example.com上公开并永久提供https://github.com/vishal1303.This奖项反映了NSF的法定使命，并且通过使用基金会的智力价值和更广泛的影响进行评估，被认为值得支持审查标准。

Stateful In-network computing (where users can run custom programs with custom state in the network data plane) has been shown to improve the performance of a wide-range of key applications from domains ranging from networking to distributed systems to databases to machine learning. Unfortunately, the enabling technology for stateful In-network computing, namely the programmable switches, have fundamental design limitations that prevent them from scaling to the growing demands of both the current and emerging In-network applications. In particular, current generation of programmable switches cannot simultaneously run large number of applications, cannot store large amounts of state needed for state-intensive applications, and cannot scale to line rate processing for certain stateful applications. This project will investigate the design of next-generation programmable switches that could simultaneously run large number of applications, store and process large amounts of state, while running at multi-Tbps line rate, at the cost of only a nominal increase in chip area and power consumption compared to current programmable switches.The limitations of current programmable switches were studied previously in the context of microprocessor-based network processors from the early 2000s. However, the fundamental difference in the processing architecture and line rate of microprocessor-based network processors compared to current programmable switches, has opened an opportunity to re-visit these problems in a completely new light. In that regard, this project will make three key innovations. First, the project will investigate new ways to store and access shared state across multiple parallel switch pipelines for achieving line rate processing for stateful applications. Second, the project will investigate ways to dynamically allocate and share switch resources at line rate, providing an abstraction of a "virtual" programmable switch to each application, in order to scale to large number of applications. And finally, the project will investigate optimal cache designs (between on-chip SRAM and off-chip DRAM) that allow visibility into future requests at runtime through co-ordination between neighbor switches in the network, to support state-intensive applications at line rate.This project also proposes several educational and outreach initiatives that will be tightly integrated with the proposed research. The systems and applications developed as part of this project will be integrated into the curriculum of both the existing and new courses at Purdue, including courses from non-networking domains, such as distributed systems and computer architecture.As part of the K-12 and underrepresented minority outreach, this project will organize an annual 1-week summer workshop at Purdue targeting high-school and incoming undergraduate students belonging to communities historically underrepresented in computer science and engineering, to encourage them to pursue a career in science and engineering by giving them hands-on experience with state-of-the-art networking technologies developed as part of this project.All the results and artifacts from this project, including the source code, will be made publicly and permanently available at the URL https://github.com/vishal1303.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.