CAREER: Integrating Microarchitecture Simulation and Side-Channel Leakage Modeling for Safer Software
CAREER: Integrating Microarchitecture Simulation and Side-Channel Leakage Modeling for Safer Software
批准号:
2338623
负责人:
Nader Sehatbakhsh
金额:
$63.75万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2024
资助国家:
美国
项目状态:
未结题
起止时间:
2024-07-01 至 2029-06-30
中文摘要
计算机,从嵌入式系统到服务器,在我们的生活中变得越来越普遍和重要。虽然这些系统执行其主要功能,即计算,但它们无意中产生的痕迹可能会通过称为“侧通道”的替代物理或数字路径泄露敏感信息。随着我们越来越依赖于计算系统,了解如何创建侧信道信号,如何模拟侧信道泄漏以及如何设计未来的软件系统以抵御侧信道攻击变得比以往任何时候都更加重要。本提案探索新的方法和工具,为广泛的处理器量化和建模侧信道。这个项目的成功完成为分析和量化侧通道带来了新的方法、发现和开源工具。各种设计人员和行业都可以从这些技术和工具中获益,包括硬件设计人员、计算机架构师、编译器设计人员和软件开发人员。我们的发现使构建安全的软件系统成为可能,同时降低了成本和上市时间。作为该研究计划的组成部分,我们还提出了一个涉及K-12,本科,研究生和更广泛的安全社区教育的教育议程。本研究计划的总体目标是建立一个全面的侧通道泄漏分析工具。为了实现这一目标,我们首先需要提高我们的建模能力,特别是对于物理侧信道,然后专注于将这些模型集成到已建立的仿真和分析工具中。基于这些需求,我们的提案分为两个研究重点和一个评估计划。每个重点进一步细分为三个主要研究目标。第一个重点是建立一个准确的工具来估计软件级别的功率和电磁(EM)侧信道。利用三个研究目标,我们计划建立一个模型,可以准确地模拟各种处理器架构以及片上系统(SoC)上的其他重要组件(例如加速器)。第二个重点是微架构侧通道的建模。具体来说,主要目标是构建一种新的工具,可以将已建立的二进制分析工具与已知的侧通道泄漏模型相结合。提出的想法将使用详细的评估计划进行评估。我们将把我们的方法应用于各种各样的系统和不同硬件和软件设计的设置。我们将考虑各种场景,包括不同的微架构设计(有序、无序、多核)和不同的侧通道(物理电磁信号、数字缓存侧通道、瞬态/推测侧通道)。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Computers, ranging from embedded systems to servers, are becoming increasingly pervasive and critical in our lives. Whilst these systems carry out their main function, which is computation, they inadvertently generate traces that could potentially disclose sensitive information through alternative physical or digital pathways known as “side-channels.” As we become increasingly dependent upon computing systems, it is more critical than ever to know how side-channel signals can be created, how side-channel leakage can be modeled, and how future software systems should be designed to be robust against side-channel attacks. This proposal explores new methods and tools for quantifying and modeling side-channels for a wide range of processors. Successful completion of this project brings new methods, findings, and open-source tools for analyzing and quantifying side-channels. Various designers and industries can gain advantages from these techniques and tools, including hardware designers, computer architects, compiler designers, and software developers. Our findings enable the construction of secure software systems while reducing cost and time-to-market. As an integral part of this research program, we also propose an educational agenda involving K-12, undergraduate, graduate, and broader security community education.The overall goal of this research proposal is to build a comprehensive tool for side-channel leakage analysis. To achieve this, we first need to improve our modeling capabilities, particularly for physical side-channels, and then focus on integrating these models into established simulation and analysis tools. Based on these needs, our proposal is structured into two research thrusts and an evaluation plan. Each thrust is further broken down into three main research objectives. The first thrust is focused on building an accurate tool to estimate power and electromagnetic (EM) side-channels at the software level. Using three research objectives, we plan to build a model that can accurately model various processor architectures as well as other important components (e.g., accelerators) on a system-on-chip (SoC). The second thrust is focused on modeling microarchitectural side-channels. Specifically, the main goal is to build a new tool that can combine established binary analysis tools with known side-channel leakage models. The ideas proposed will be evaluated using a detailed evaluation plan. We will apply our methods to a wide variety of systems and setups with different hardware and software designs. We will consider various scenarios including different microarchitecture designs (in-order, out-of-order, multicore) and different side-channels (physical electromagnetic signals, digital cache side-channels, transient/speculative side-channels).This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
CSR: Small: Leveraging Physical Side-Channels for Good
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批准号:2312089
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项目类别:Standard Grant
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资助金额:$59.99万
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财政年份:2024
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负责人:Nader Sehatbakhsh
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依托单位:
Collaborative Research: SaTC: CORE: Medium: Security and Robustness for Intermittent Computing Using Cross-Layer Post-CMOS Approaches
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批准号:2303115
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项目类别:Continuing Grant
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资助金额:$40.0万
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财政年份:2023
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负责人:Nader Sehatbakhsh
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依托单位:
Collaborative Research: CNS Core: Medium: IoCT: System Mechanisms for Enabling an Internet of Collaborative Things
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批准号:2211301
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项目类别:Standard Grant
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资助金额:$79.91万
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财政年份:2022
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负责人:Nader Sehatbakhsh
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依托单位:
海外基金