Optimum Capacitor Switching Algorithms For Successive Approximation Register (SAR) Analogue-to-Digital Converters (ADC)

用于中等速度和中等分辨率应用的模数转换（ADC）通常由电容式逐次逼近寄存器（SAR）模数转换器执行。它们采用三个核心功能：充电电容器，电荷重新分配和电压比较。它们中的每一个都消耗电池电力或燃烧电力。电荷再分配DAC及其控制逻辑是总功耗的主要部分。根据电源的波形，从电压源对电容器充电提供潜在的功率节省。在这个项目中，我们结合联合收割机的最佳波形设计和新的开关方案，以实现最小的功耗。为了比较不同的开关方案，定义了一个新的开关方案的品质因数（FoM），以涵盖能耗、线性度和速度。硅的概念验证结束了该项目，并将展示所实现的节能效果。

Analogue-to-digital conversion (ADC) for medium speed and medium resolution applications is often performed by capacitively successive approximation register (SAR) analogue-to-digital converters. They employ three core functions: charging capacitors, charge redistribution and voltage comparison. Each of them consumes battery power or burns power. The charge redistribution DAC, together with its control logic, is a major part of the total power consumption. Charging capacitors from a voltage source offers potential power savings depending on the wave form of the power source. In this project we combine optimum wave form design and new switching schemes to achieve minimal power consumption. Microelectronic implementation constraints, e.g. parasitics from layout are also taken into account for practically realizable switching schemes.For comparison of different solutions a new figure of merit (FoM) for the switching schemes will be defined to cover energy consumption, linearity and speed. A proof of concept in silicon concludes the project and will demonstrate the achieved energy savings.