Room-temperature broadband MIR photodetector based on Si:Te for wafer-scale integration

硅的室温宽带红外光响应对于开发片上cmos兼容光子平台具有重要意义。利用离子注入和脉冲激光熔化的深能级杂质制备的原型硅基光电探测器在室温下表现出亚带隙光响应。然而，有关光电探测器性能的关键问题尚未得到解决，包括比探测率（D*），噪声等效功率和响应速度。最重要的是，缺乏脉冲激光熔化的可扩展性抑制了工业应用和由此产生的硅基光电探测器的晶圆级集成。在本提案中，我们将通过结合离子注入和闪光灯退火的工业兼容方法，实现Si:Te层的固相外延生长和室温Si:Te MIR光电探测器的晶圆级集成优化。与脉冲激光熔化不同，闪光灯退火允许制备晶圆级MIR光电探测器阵列，并具有工业应用的可扩展性。将p型Si衬底注入Te离子，然后退火以恢复注入层，并通过ms范围闪光灯退火激活Si中的Te掺杂剂。合成过程的所有参数将被微调，以获得高质量的单晶Si:Te层。在此基础上，将制备出Si:Te MIR光电探测器原型。他们的电气（暗电流）和光学（EQE， D*和噪声等效功率）特性以及与商业产品的竞争力将被调查和优化。因此，为了集成CMOS光子学，将尝试在硅片级Si衬底上用于MIR的光探测的Si:Te光电探测器阵列。

Room-temperature broadband infrared photoresponse in Si is of great interest for the development of on-chip CMOS-compatible photonic platforms. Prototype Si-based photodetectors by utilizing deep-level impurities via ion implantation and pulsed laser melting have shown sub-bandgap photoresponse at room-temperature. However, the critical issues concerning the performance of photodetectors have not been addressed, including the specific detectivity (D*), the noise equivalent power, and the response speed. Most importantly, the missing scalability of pulsed laser melting inhibits both the industry application and the wafer-scale integration of the resulting Si-based photodetectors. In this proposal, we will realize the solid phase epitaxial growth of Si:Te layers and the optimization of room-temperature Si:Te MIR photodetectors for wafer-scale integration via an industry-compatible approach of combining ion implantation and flash lamp annealing. Different from pulsed laser melting, flash lamp annealing allows for the preparation of wafer-scale MIR photodetector arrays and the scalability for industry applications. The p-type Si substrate will be implanted with Te ions, then subsequently annealed for the restoration of the as-implanted layer and the activation of Te dopants in Si by ms-range flash lamp annealing. All the parameters of the synthesis process will be fine-tuned to obtain high quality single-crystalline Si:Te layers. Based on the optimized materials, prototype Si:Te MIR photodetectors will fabricated. Their electrical (dark current) and optical (EQE, D* and noise equivalent power) characteristics as well as the competitiveness with the commercial products will be investigated and optimized. As a result, Si:Te photodetector arrays on wafer-scale Si substrate for photodetection at MIR will be attempted for the integration of CMOS photonics.