Study on speculative parallel architecture using runtime program restructuring

提出了一种利用片上资源的推测并行架构。所提出的架构运行时重构在运行时从顺序二进制程序动态提取并行性。为了减少与现有线程级推测体系结构中频繁的fork/join和频繁的寄存器到寄存器通信相关的开销，Runtime Restructuring将顺序二进制程序修改为重复执行的推测SPMD程序。由于控制流的生成受过去执行历史的影响，为了获得准确的执行状态，控制流的并行化是必要的。然后，我们引入了一种二进制翻译方法，以减少分析并行结构和寄存器依赖的开销。我们展示了控制流并行形成的细节，以及在SPEC基准上的评估结果。Tomcatv获得3.9倍的性能，压缩在4cpu上获得显著的性能提升。在SPEC INT基准测试中，二进制转换有助于减少短循环中的开销。

The speculative parallel architecture utilizing on-chip resources is proposed. The proposed architecture, Runtime Restructuring extracts parallelism dynamically at runtime from a sequential binary program. In order to reduce overheads associated with frequent fork/join and frequent register-to- register communication in existing thread-level speculative architecture, Runtime Restructuring modifies a sequential binary program to a speculative SPMD program with duplicated execution.Since generation of control flow is influenced by the history of past execution, its parallelization is necessary to achieve the accurate execution status. Then we introduce a binary translation method to reduce overheads for analyzing parallel constructs and register dependency. We show the details of the parallel formation of control flow, and the evaluation results on SPEC benchmarks. Tomcatv gets 3.9 times and compress gets significant performance gain on 4CPUs. On SPEC INT benchmarks, binary translation is useful to reduce overheads in short loops.