Collaborative Research: CPA-CPL-T: An Effective Automatic Parallelization Framework for Multi-Core Architectures

多核处理器的普及使并行计算成为主流。现在必须开发大量现有顺序代码的并行实现。 对这些架构进行编程以有效挖掘多个片上处理单元的潜力的难度是一个重大挑战。虽然编译器技术在自动并行化方面取得了重大进展，但目前的实践状况仍有许多不足之处。 迫切需要系统的，一般的，有效的理论基础，这样的努力是一个主要的动机，这个项目将建立在一些非常近期的发展，使用多面体模型显示出很大的希望，为多核架构开发有效的自动并行化框架。利用多面体模型，可以使用来自线性代数和线性规划的强大机器在完全数学的设置中推理复杂循环变换的正确性。 这可以实现有效的集成转换，因此可以作为开发一个非常强大的自动并行化框架的基础，该框架可以针对不同的多核平台。 该项目将解决一些关键问题，这些问题对于开发一个在一系列用户应用程序代码中有效的自动并行化和数据局部优化框架非常重要：（i）模型驱动搜索，以确定有效的瓦片大小和循环融合选择;（ii）扩展瓦片方法，如重叠/分割瓦片，以提高并发性;（iii）为具有多个不同地址空间的加速器自动生成并行代码;以及（iv）开发一套广泛的基准测试软件，以评估自动并行化系统。

The ubiquity of multi-core processors has brought parallel computing squarely into the mainstream. It is now essential to develop parallel implementations of a large number of existing sequential codes. The difficulty of programming these architectures to effectively tap the potential of multiple on-chip processing units is a significant challenge. Although there has been significant progress in compiler techniques towards automatic parallelization, the current state-of-practice leaves much to be desired. The pressing need for systematic, general, and effective theoretical foundations for such efforts is a major motivation for this project.This project will build on some very recent developments using polyhedral models showing great promise for developing effective automatic parallelization frameworks for multi-core architectures. With the polyhedral model, it is possible to reason about the correctness of complex loop transformations in a completely mathematical setting using powerful machinery from linear algebra and linear programming. This enables effective integrated transformation, and therefore can be the basis for developing a very powerful automatic parallelization framework that can target different multi-core platforms. The project will address a number of key issues that are very important in developing an automatic parallelization and data locality optimization framework that is effective over a range of user application codes: (i) model-driven search for determination of effective tile sizes and loop fusion choices; (ii) extended tiling approaches like overlapped/split tiles to enhance concurrency; (iii) automatic generation of parallel code for accelerators with multiple distinct address spaces; and (iv) development of an extensive benchmark suite for assessment of automatic parallelization systems.The developed software will be made publicly available.