Study for Data Acquisition System and Computer Simulation for Super High Energy Hadron Collider (SSC)

这项研究是为利用超导超级对撞机（SSC）寻找超高能量的希格斯粒子等基本粒子物理学的研究做准备。国际实验团队SDC于1989年成立。日本物理学家打算大规模参与SDC。该项目从探测器研发*探测器设计*建造*物理数据采集*数据分析，历时10余年。我们刚刚通过了探测器的设计阶段。为了使物理实验可行，必须在读出电子、数据采集、计算机包括计算机仿真等方面采用高技术。本研究旨在结合日美高能物理合作的支持，促进数据采集/计算机相关学科的研发和设计工作。在本研究的支持下取得的成果有：(1)SDC探测器的总体设计；(2)针对特定探测器的VLSI的开发，如硅和稻草跟踪器，特别是TMC（时间记忆单元），一种利用CMOS存储技术实现时间数字化的新电路思想，由日本团队开发和测试。(3)高速交换装置事件生成器的概念设计；(4)对撞机事件与探测器元件通用仿真程序的创建；(5)SSC实验脱机计算系统的概念设计。

This research is to prepare the study of elementary particle physics such as search for Higgs particles at super high energies using Superconducting Super Collider (SSC). An international experimental team SDC was formed in 1989. Japanese physicists intend to participate SDC in large scale. The project extends over 10 years with the sequence of detector R&D* detector design* construction* physics data taking* data analysis. We just passed the stage of detector design. In order to make the physics experiment feasible, a high technology must be employed in readout electronics, data acquisition, computers including computer simulation. This research aims to promote the R&D and design efforts in the data-acquisition/computer related subjects in conjunction with the support from the Japan-US cooperation in high-energy physics. The achievements under the support of the present research are :(1) Overall design of SDC detector,(2) Development of VLSI for specific detectors, such as silicon and straw trackers, Especially TMC (time memory cell), a new circuit idea of time digitization using CMOS memory technology, was developed and tested by Japanese group.(3) Conceptual design of the event builder with high speed switching devices,(4) Creation of common simulation program for collider events and detector elements and(5) Conceptual design of the off-line computing system for experiment at SSC.