GW4 Tier 2 HPC Centre for Advanced Architectures

这项由布里斯托尔、巴斯、加的夫和埃克塞特组成的GW4联盟联合体与克雷和英国气象局合作提出的这项提议，是为了提供全国性的基于位ARM的高性能计算服务。该系统将是世界上首批基于博通Vulcan服务器级芯片的系统之一。该设备的细节仍在保密协议中，但Vulcan CPU正在产生兴奋，因为它牺牲了更多的内存带宽，而不是强调峰值翻转/S，前者对大多数科学代码更重要。因此，将这样一台机器作为国家服务提供访问，应该能够使英国的HPC社区量化专注于内存带宽的CPU的好处，从而为未来从第一层到第三层的系统采购提供信息。如果这种对内存带宽的更大关注确实如预期的那样，导致更高的性能和科学吞吐量，那么基于ARM64的机器，如我们在此次竞标中提议的Cray XC Scout系统，将从2017年起成为第一层和第三层生产系统的真正竞争者。除了我们的目标是提供世界上第一个ARM64生产HPC系统之一，这项提案还将提供一项服务，以支持算法开发以及为ARM64机器做好准备的科学代码的移植和优化。这种算法和软件工作是任何体系结构评估的关键部分，因为只有当体系结构的优化级别相似时，才可能进行严格的体系结构到体系结构的比较。随着世界各地正在进行多个基于ARM的HPC项目，HPC社区内已经对评估ARM64产生了极大的兴趣。我们提议的机器将能够“开箱即用”运行大多数现有代码，支持最常见的并行编程语言，包括OpenMP和MPI。因此，大多数用户应该能够以最小的努力开始评估这项服务，因此我们预计需求将是强劲的。该系统将作为国家设施运行，通过轻量级资源分配过程公开调用计算时间。一个最高级别的联盟管理委员会将决定不同应用领域之间的资源分配政策，以及下一代并行算法的基础计算科学研究。运营费用将由财团及其合作伙伴支付。系统管理员和电力成本将在合作伙伴之间分摊，而一组专家研究软件工程师将帮助社区开发新的算法、端口代码并严格评估这一重要的新架构。

This proposal by a consortium of the GW4 Alliance of Bristol, Bath, Cardiff and Exeter, in partnership with Cray and the Met Office, is to provide a national 64-bit ARM-based HPC service. The system will be one of the world's first to be based on Broadcom's Vulcan server-class chip. Details of this device are still under NDA, but the Vulcan CPU is generating excitement because it trades off much greater provision of memory bandwidth for less emphasis on peak FLOP/s, the former being more important for most scientific codes. Providing access to such a machine as a national service should therefore enable the UK's HPC community to quantify the benefit of memory bandwidth focused CPUs, thus informing future system procurements from Tier 1 to Tier 3. If this greater focus on memory bandwidth does, as expected, result in greater performance and science throughput, then ARM64-based machines, such as the Cray XC Scout system that we are proposing in this bid, will be genuine contenders for Tier 1 and Tier 3 production systems from 2017. In addition to our goal of providing one of the world's first ARM64 production HPC systems, this proposal will also provide a service to enable algorithm development and the porting and optimisation of scientific codes in readiness for ARM64 machines. This algorithm and software effort is a crucial part of any architectural evaluation, as rigorous architecture-to-architecture comparisons are only possible when optimisation levels across the architectures are similar. There is already tremendous interest in evaluating ARM64 within the HPC community, with multiple ARM-based HPC projects underway around the world. Our proposed machine will be able to run most existing codes "out of the box", supporting the most common parallel programming languages, including OpenMP and MPI. Thus most users should be able to begin to evaluate the service with minimal effort, and so we expect demand to be strong.The system will be run as a national facility, with open calls for computing time allocated via a lightweight resource allocation process. A top-level Consortium Management Board will determine the policy for resource allocation between the different application areas as well as fundamental computational science research into next generation parallel algorithms. Operating expenses will be covered by the consortium and its partners. Systems administrator and power costs will be split across the partners, while a group of expert research software engineers will help the community develop new algorithms, port codes and rigorously evaluate this important new architecture.