A High-level Design Environment for the Rapid FPGA Implementations of Deep Learning Architecture

人工智能（AI）正在成为图像处理和模式识别等行业中许多应用的默认选择。因此，在工业界和学术界都有大量的工作在开发和实现AI算法，使用方便的框架，如TensorFlow和PyTorch。这些框架在CPU和GPU平台上都能很好地工作。然而，当有严格的功率要求时，GPU和CPU无法提供足够的功率效率，FPGA将用于运行AI应用程序的推理。不幸的是，这些框架与FPGA的设计环境不兼容，因为用户需要使用寄存器传输级（RTL）中的硬件描述语言（HDL）来实现FPGA的设计。即使使用供应商最近的高级综合（HLS）工具，允许用户使用C/C++而不是RTL，人工智能应用程序也过于复杂，无法在短时间内实现。因此，该项目的目标是为AI开发人员提供一个真正的高级环境，以便使用Python（AI开发领域最常用的语言）在FPGA上快速实现其AI应用程序，而无需任何硬件知识。AI开发人员可以在FPGA上实现他们的AI应用程序，就像PC一样简单。

Artificial Intelligence (AI) is becoming the default choice for many of the applications in the industries such as image processing and pattern recognition. As a result, there has been a great deal of work on developing and implementing AI algorithms in both industry and academia, using convenient frameworks like TensorFlow and PyTorch. These frameworks work fine on both CPU and GPU platforms. However, when there are strict power requirements, GPU and CPUs cannot provide enough power efficiency and FPGAs will be used for running the inference of the AI applications. Unfortunately, those frameworks are not compatible with the design environment of FPGAs as users are required to use Hardware Description Languages (HDL) in Register Transfer Level (RTL) to implement designs to FPGAs. Even with the vendor's recent High-level Synthesis (HLS) tools, which allow users to use C/C++ instead of RTL, the AI applications are too complex to implement within a short period. Thus, the aim of this project is to deliver a true high-level environment for AI developers to rapidly implement their AI applications on FPGAs using Python, the most common language in the world of AI development, without any hardware knowledge. AI developers can implement their AI applications on FPGAs just as easy as PC.