Hybrid pulse processor for synchrotron detectors

描述（由申请人提供）： 该提案的目标是开发新的放大和处理电子器件，以增强大面积硅漂移探测器（SDD），用于同步辐射应用中的高计数率和高能量分辨率。用大有效面积（~50 mm）硅漂移探测器（SDD）结构获得的最新结果表明，SDD非常适合于在高计数率条件下的极高分辨率X射线光谱操作。一个最终的光谱仪优化用于在500 eV至10 keV的区域，预计将产生电子噪声在10个电子RMS附近，并将能够计数率超过10/6 cps从一个单一的检测器通道。不幸的是，没有商业放大和处理电子设备可以充分利用这些新探测器。 我们提出了一种新的方法，涉及模拟和数字设计相结合的放大和处理电子产品的发展。所提出的混合设计将利用模拟方法实现短峰值时间（<1 μ s）和高计数率，并利用数字方法实现较长峰值时间（> 1 μ s）和较低计数率。在第一阶段，我们将开发一个模拟处理器的原型，其中包含信号整形、放大、峰值检测和合并脉冲以创建能量色散X射线光谱的电路。通过对电路的计算机仿真和关键电子元器件的选型，实现了设计的优化。在项目的第二阶段，我们将开发滤波器的数字实现，并将模拟和数字电路集成到一个设计中。将在Photon Imaging实验室以及SSRL和APS的同步加速器光束线上对电子器件和漂移探测器进行测试。

DESCRIPTION (provided by applicant): The goal of this proposal is to develop new amplification and processing electronics to augment large area silicon drift detectors (SDD) for operation at high-count-rate and high-energy resolution in synchrotron radiation applications. Recent results obtained with large active area (~50 mm}) silicon drift detector (SDD) structures shows that the SDDs are eminently suited to extremely high-resolution x-ray spectroscopy operation at high count rate conditions. A finalized spectrometer optimized for use in the 500 eV to 10 keV region is expected to yield electronic noise in the vicinity of 10 electrons RMS and will be capable of count rates exceeding 10/6 cps from just a single detector channel. Unfortunately, there is no commercial amplification and processing electronics that can take full advantage from these new detectors. We are proposing a novel approach for the development of amplification and processing electronics involving combination of analog and digital designs. The proposed hybrid design will utilize analog approach for short peaking times (<1mus) and high count rates and digital approach for longer peaking times (>1mus) and lower count rates. During Phase I we will develop a prototype of the analog processor containing circuits for signal shaping, amplification, peak detection, and binning the pulses to create an energy dispersive x-ray spectrum. By computer simulations of the circuits and selection of values of the key electronic components will achieve the optimization of the design. In the Phase II of the project we will develop the digital implementation of the filters and we will integrate the analog and digital circuits into a one design. Testing of the electronics together with the drift detectors will be performed in the laboratory at Photon Imaging and at SSRL and APS on synchrotron beam lines.