Synthesis of Heterogeneous Multi Processor System-on-Chip with Optical Interconnect

嵌入式系统的市场正在迅速增长，而应用程序正在被设计为暴露底层算法的固有并行性。传统的处理器和片上通信架构不能很好地满足嵌入式应用程序严格的性能和功耗要求。当前的芯片设计趋势表明，芯片上的晶体管数量和芯片上各种技术的可用性不断增加。这些趋势使得多处理器芯片与集成光通信架构相互连接的制造成为可能。这项技术有望创造出高性能、低功耗的系统。然而，这种系统的手工设计是一个耗时且容易出错的过程，从而对这种系统的成本和质量产生负面影响。本研究计划的长期目标是，从并行应用模型中自动合成与最有效的通信体系结构相互连接的最佳处理元素集。我们建议在系统的计算部分使用特定应用处理器（asp），并在互连架构中使用集成光学。在接下来的五年里，我们建议开发：(1)从并行应用模型中自动合成ASP核心；(2)新的方法和工具，以促进在给定功率、性能和可靠性限制下有效设计和评估可扩展的片上光网络；(3)将并行应用自动映射到具有异构ASP核心的光网络系统。我们将利用消费电子、生物医学和航空电子应用领域的应用来推动我们的研究工作。这些应用领域是加拿大经济的关键驱动力，有效实施这些应用的解决方案将为加拿大设计公司提供竞争优势。

The market for embedded systems is growing rapidly while applications are being designed to expose the inherent parallelism of the underlying algorithms. Conventional processors and on-chip communication architectures do not scale well with the stringent performance and power requirements of embedded applications. Current trends in chip design indicate increasing number of transistors on chip and on-chip availability of diverse technologies. These trends have enabled the fabrication of multi-processor chips interconnected with integrated optical communication architectures. This technology promises to create systems that provide high performance and low power consumption. However, the manual design of such systems is a time consuming and error prone process, thereby negatively impacting the cost and quality of such systems.The long term objective, addressed by this research program, is to automatically synthesize the optimal set of processing elements interconnected with the most efficient communication architecture from a parallel application model. We propose the use of application specific processors (ASPs) for the computational part of the system, and integrated optics for the interconnect architecture. Over the next five years, we propose to develop: (1) automatic synthesis of ASP cores from parallel application models, (2) novel methodologies and tools to facilitate efficient design and evaluation of scalable Optical Network-on-Chip for given power, performance and reliability constrains, and (3) automatic mapping of parallel applications to systems with optical network of heterogeneous ASP cores. We will use applications from consumer electronics, bio-medical, and avionics application domains to drive our research efforts. These application domains are key drivers of the Canadian economy and solutions for efficient implementation of such applications will provide the competitive edge to Canadian design companies.