Many-core Platforms for Time-Critical Systems

网络物理系统(CPS)是下一代智能、互联的嵌入式系统。先进的CP，如自动驾驶汽车，依赖于复杂的传感器处理和传感器融合能力；因此，它们需要巨大的计算能力。为了满足这种需求，多核架构越来越被认为是有吸引力的选择。建议的平台既包括传统多核架构的放大版本，也包括包括单指令多数据加速器(如GPU)的复杂片上系统，这些加速器特别适合视频处理和类似的高度并行任务。CP是表现出实时要求的安全关键系统：未能在精确的时间窗口(截止日期)内计算所需的启动命令可能会导致灾难性的结果，包括生命损失。因此，CPS中使用的计算平台必须是定时可预测的，即能够在具有不同关键程度的子系统之间提供严格的定时保证和性能隔离。遗憾的是，当前的商用现成(COTS)多核体系结构主要面向消费者或高性能计算市场，因此在设计时并没有考虑到这些目标。*我们认为，确保安全关键应用程序的可预测时间的关键是控制对共享资源的访问，包括存储器层次结构和片上互连，并在所有处理核心之间协调它们的使用。该项目的主要目标是为多核平台上的实时任务开发、实施和演示基于软件的、可预测的执行模型。将使用自动化编译器工具链来分析、编译和优化基于并行编程API(OpenMP)的并行程序。新的线程分配和调度方案将被引入来优化内存和通信带宽的使用，同时促进时序分析。*所提出的研究将对高性能、时间关键型CP的设计做出重要贡献。我们认为，这是一个战略领域，在发现号计划的推动下，基础研究是实现初始原型状态的迫切需要。我们将通过架构模拟和在现有多核COTS平台上的实现来验证我们的工具链和算法的有效性。我们的技术将在滑铁卢大学合作开发的自动驾驶汽车演示程序的背景下进行集成和测试。

Cyber-Physical Systems (CPS) are the next generation of smart, interconnected embedded systems. Advanced CPS, such as autonomous vehicles, rely on complex sensor processing and sensor fusion capabilities; hence, they require significant computational power. To address such needs, many-core architectures are increasingly considered attractive choices. Proposed platforms include both scaled-up versions of traditional multi-core architectures, as well as complex systems-on-chip comprising single-instruction-multiple-data accelerators such as GPU, which are especially suitable for video processing and similar highly parallel tasks. CPS are safety-critical systems exhibiting real-time requirements: a failure to compute required actuation commands within a precise time window (deadline) can lead to catastrophic results, including loss of human life. For this reason, computing platforms used in CPS must be timing predictable, i.e., able to provide strict timing guarantees and performance isolation between subsystems with different criticalities. Unfortunately, current Commercial-Off-The-Shelf (COTS) many-core architectures are mainly targeted at either the consumer or high-performance computing markets, and thus are not designed with such objectives in mind. ******We argue that the key to guarantee predictable timing for safety-critical applications is to control accesses to shared resources, including the memory hierarchy and on-chip interconnections, and coordinate their usage between all processing cores. The main goal of this project is to develop, implement and demonstrate software-based, predictable execution models for real-time tasks on many-core platforms. An automated compiler toolchain will be used to analyze, compile and optimize parallel programs based on a parallel programming API (OpenMP). Novel thread allocation and scheduling schemes will be introduced to optimize the usage of memory and communication bandwidth, while at the same time facilitating timing analysis.******The proposed research will make essential contributions to the way high-performance, time-critical CPS are designed. We believe that this is a strategic area where fundamental research, as enabled by the Discovery program, is sorely needed to achieve initial prototype status. We will demonstrate the validity of our toolchain and algorithms through both architectural simulations and implementation on existing many-core COTS platforms. Our techniques will be integrated and tested in the context of an autonomous vehicle demonstrator, developed collaboratively at the University of Waterloo.