Time-predictable resource sharing for commercial-off-the-shelf embedded architectures

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Embedded systems are moving from federated architectures, where logical applications and subsystems are implemented on different hardware components, to progressively more integrated platforms which use extensive sharing of physical resources such as CPU time, memories, and power. Furthermore, they are increasingly built using Commercial-Off-The-Shelf (COTS) components in an attempt to increase performance and reduce cost and time to market. However, integrating COTS in safety-critical systems such as those in the medical, avionics and automotive industry is challenging. These systems require strict timing guarantees and isolation between subsystems to safely interact with the environment, but COTS are not typically designed with such objectives in mind. The main goal of this research is to prove that safe embedded systems can be built from high performance, inexpensive COTS components. In particular, in this project I will develop a methodology to greatly increase the time predictability of the memory and communication subsystems in COTS-based embedded hardware architectures. I will do so by controlling multicore task execution and communication using both compiler techniques and operating system abstractions, and by creating predictable and concurrent scheduling policies for access to shared memory resources. The cost of subsystem integration and safety verification and certification will quickly spiral out of control unless new design methodologies are introduced in the safety-critical embedded industry. By making system execution predictable and repeatable, my methodology will contribute to a new generation of embedded systems that are safer, more performant and cheaper to produce.