Many-core Platforms for Time-Critical Systems

信息物理系统（CPS）是下一代智能互联嵌入式系统。先进的CPS，如自动驾驶汽车，依赖于复杂的传感器处理和传感器融合能力;因此，它们需要大量的计算能力。为了满足这些需求，众核架构越来越被认为是有吸引力的选择。提出的平台包括传统多核架构的放大版本，以及包括单指令多数据加速器（如GPU）的复杂片上系统，这些系统特别适用于视频处理和类似的高度并行任务。CPS是具有实时要求的安全关键系统：未能在精确的时间窗口（截止日期）内计算所需的驱动命令可能导致灾难性的结果，包括人员生命损失。出于这个原因，CPS中使用的计算平台必须是定时可预测的，即，能够在具有不同关键性的子系统之间提供严格的时序保证和性能隔离。不幸的是，目前的商用现货（COTS）众核架构主要针对消费者或高性能计算市场，因此没有考虑到这些目标进行设计。 我们认为，关键是要保证可预测的安全关键型应用程序的时间是控制访问共享资源，包括存储器层次结构和片上互连，并协调所有处理核心之间的使用。该项目的主要目标是开发，实现和演示基于软件的，可预测的执行模型，用于众核平台上的实时任务。自动化编译器工具链将用于基于并行编程API（OpenMP）分析、编译和优化并行程序。将引入新的线程分配和调度方案，以优化内存和通信带宽的使用，同时方便时序分析。 拟议的研究将作出重要贡献的方式高性能，时间关键型CPS的设计。我们认为，这是一个战略领域，迫切需要基础研究，如发现计划所实现的，以实现初始原型状态。我们将通过架构模拟和在现有众核COTS平台上的实现来证明我们的工具链和算法的有效性。我们的技术将在滑铁卢大学合作开发的自动驾驶汽车演示器的背景下进行集成和测试。

Cyber-Physical Systems (CPS) are the next generation of smart, interconnected embedded systems. Advanced CPS, such as autonomous vehicles, rely on complex sensor processing and sensor fusion capabilities; hence, they require significant computational power. To address such needs, many-core architectures are increasingly considered attractive choices. Proposed platforms include both scaled-up versions of traditional multi-core architectures, as well as complex systems-on-chip comprising single-instruction-multiple-data accelerators such as GPU, which are especially suitable for video processing and similar highly parallel tasks. CPS are safety-critical systems exhibiting real-time requirements: a failure to compute required actuation commands within a precise time window (deadline) can lead to catastrophic results, including loss of human life. For this reason, computing platforms used in CPS must be timing predictable, i.e., able to provide strict timing guarantees and performance isolation between subsystems with different criticalities. Unfortunately, current Commercial-Off-The-Shelf (COTS) many-core architectures are mainly targeted at either the consumer or high-performance computing markets, and thus are not designed with such objectives in mind. We argue that the key to guarantee predictable timing for safety-critical applications is to control accesses to shared resources, including the memory hierarchy and on-chip interconnections, and coordinate their usage between all processing cores. The main goal of this project is to develop, implement and demonstrate software-based, predictable execution models for real-time tasks on many-core platforms. An automated compiler toolchain will be used to analyze, compile and optimize parallel programs based on a parallel programming API (OpenMP). Novel thread allocation and scheduling schemes will be introduced to optimize the usage of memory and communication bandwidth, while at the same time facilitating timing analysis. The proposed research will make essential contributions to the way high-performance, time-critical CPS are designed. We believe that this is a strategic area where fundamental research, as enabled by the Discovery program, is sorely needed to achieve initial prototype status. We will demonstrate the validity of our toolchain and algorithms through both architectural simulations and implementation on existing many-core COTS platforms. Our techniques will be integrated and tested in the context of an autonomous vehicle demonstrator, developed collaboratively at the University of Waterloo.