Graph-Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP
Graph-Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP
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DSA-MP 基于图形的冗余过孔插入和指导模板分配
DOI：
10.1109/tvlsi.2018.2850044
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发表时间：
2018-07
期刊：
影响因子：
--
通讯作者：
Wenxing Zhu
中科院分区：
文献类型：
--
作者：
Xingquan Li;Bei Yu;Jiaojiao Ou;Jianli Chen;David Z Pan;Wenxing Zhu
在电路设计中，插入冗余通孔是提高通孔成品率所必需的。嵌段共聚物定向自组装(DSA)是一种新兴的、很有前途的光刻技术，用于制造过孔和冗余过孔，其中引导模板用于提高分辨率。考虑到通孔层的可制造性，在先进的设计中也需要多图案(MP)光刻。针对后处理阶段MP问题，研究了DSA的冗余通孔插入和引导模板分配问题。我们提出了一个基于图方法的解决方案框架。首先，通过分析引导模板的结构，提出了一种新的解表示方法，通过引入多重解的概念来丢弃冗余解，然后在紧凑解表示的基础上，在网格模型上构造冲突图。其次，我们将单图案问题描述为一个约束的最大权重无关集问题，并引入了一种快速的线性插值法来获得局部最优解。为了避免局部最优解的产生，我们提出了一种有效的初始解生成方法。我们的框架是通用的，并进一步扩展到以两阶段的方式解决双图案(DP)或三图案(TP)的问题。实验结果验证了该方法的有效性和有效性。具体地说，与解决SP、DP和TP问题的最新工作相比，我们的方法可以分别节省58%、82%和96%的运行时间。
Inserting redundant vias is necessary for improving via yield in circuit designs. Block copolymer directed self-assembly (DSA) is an emerging and promising lithography technology for the manufacture of vias and redundant vias, in which guiding templates are used to enhance the resolution. Considering manufacturability of via layer, multiple patterning (MP) lithography is also needed in advanced designs. In this paper, we study the redundant via insertion and guiding template assignment for DSA with MP problem at the postrouting stage. We propose a graph-methodology-based solution framework. First, by analyzing the structure of guiding templates, we propose a new solution expression by introducing the concept of multiplet to discard redundant solutions, and then, honoring the compact solution expression, we construct a conflict graph on the grid model. Second, we formulate the problem with single patterning (SP) as a constrained maximum weight-independent set problem, for which a fast linear interpolation algorithm is introduced to obtain a local optimal solution. To avoid undesirable local optima, we propose an effective initial solution generation method. Our framework is general and is further extended to solve the problem with double patterning (DP) or triple patterning (TP) in a two-stage manner. Experimental results validate the efficiency and effectiveness of our method. Specifically, compared with the state-of-the-art work for the problem with SP, DP, and TP, our method can save 58%, 82%, and 96% runtime, respectively.
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影响因子：
1.1
作者：
Frieze, A;Jerrum, M
通讯作者：
Jerrum, M
DOI：
10.1145/1118299.1118376
发表时间：
2006-01
期刊：
Asia and South Pacific Conference on Design Automation, 2006.
影响因子：
--
作者：
Kuang‐Yao Lee;Ting-Chi Wang
通讯作者：
Kuang‐Yao Lee;Ting-Chi Wang
DOI：
10.1109/iccad.2011.6105297
发表时间：
2008-11
期刊：
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
影响因子：
--
作者：
Bei Yu;Kun Yuan;Boyang Zhang;Duo Ding;D. Pan
通讯作者：
Bei Yu;Kun Yuan;Boyang Zhang;Duo Ding;D. Pan
DOI：
10.1109/tcad.2008.2006151
发表时间：
2008-12
影响因子：
2.9
作者：
Kuang‐Yao Lee;Cheng-Kok Koh;Ting-Chi Wang;Kai-Yuan Chao
通讯作者：
Kuang‐Yao Lee;Cheng-Kok Koh;Ting-Chi Wang;Kai-Yuan Chao
DOI：
10.1145/2228360.2228579
发表时间：
2012-06
期刊：
DAC Design Automation Conference 2012
影响因子：
--
作者：
Shao-Yun Fang;Yao-Wen Chang;Wei-Yu Chen
通讯作者：
Shao-Yun Fang;Yao-Wen Chang;Wei-Yu Chen