Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator

Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator
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虚拟化后摩尔定律模拟网格处理器:光子 PDE 加速器的案例

DOI:
10.1145/3544971
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发表时间:
2022
影响因子:
2
通讯作者:
El-Ghazawi, Tarek
El-Ghazawi, Tarek
中科院分区:
计算机科学3区
文献类型:
--
作者:
Anderson, Jeff;Kayraklioglu, Engin;Imani, Hamid Reza;Shen, Chen;Miscuglio, Mario;Sorger, Volker J.;El-Ghazawi, Tarek

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创新的处理器架构旨在在摩尔定律终结所施加的严格限制下,在未来维持性能改进方面发挥关键作用。可重构光学计算机(ROC)就是这样一种创新的后摩尔定律处理器。 ROC 旨在一次性求解偏微分方程,而不是基于昂贵的迭代计算的现有解决方案。这是通过利用光学元件网格的物理特性来实现的,这些光学元件的行为类似于集总电气元件。然而,需要虚拟化来解决加速器硬件的不足。即,(1)构建大型光子阵列来适应任意大的问题是不可行的,(2)由于未来制造技术的进步,问题和加速器网格尺寸不匹配而导致利用率不足。在这项工作中,我们介绍了一种利用光计算技术优势的 ROC 轻量级虚拟化架构和方法。具体来说,我们将时间和空间虚拟化应用于ROC,然后通过引入频谱虚拟化来扩展加速器调度交易空间。此外,我们研究了基于片上系统 (SoC) 的 PDE 加速架构的多种资源调度策略,并表明虚拟配置管理可提供大约 2 倍的加速。最后,我们表明虚拟化带来的开销是最小的,并且我们的实验结果表明,与微处理器执行相比,速度提高了两个数量级,同时将虚拟化引起的错误保持在 10% 以下。
Innovative processor architectures aim to play a critical role in future sustainment of performance improvements under severe limitations imposed by the end of Moore’s Law. The Reconfigurable Optical Computer (ROC) is one such innovative, Post-Moore’s Law processor. ROC is designed to solve partial differential equations in one shot as opposed to existing solutions, which are based on costly iterative computations. This is achieved by leveraging physical properties of a mesh of optical components that behave analogously to lumped electrical components. However, virtualization is required to combat shortfalls of the accelerator hardware. Namely, (1) the infeasibility of building large photonic arrays to accommodate arbitrarily large problems and (2) underutilization brought about by mismatches in problem and accelerator mesh sizes due to future advances in manufacturing technology. In this work, we introduce an architecture and methodology for lightweight virtualization of ROC that exploits advantages borne from optical computing technology. Specifically, we apply temporal and spatial virtualization to ROC and then extend the accelerator scheduling tradespace with the introduction of spectral virtualization. Additionally, we investigate multiple resource scheduling strategies for a system-on-chip (SoC)-based PDE acceleration architecture and show that virtual configuration management offers a speedup of approximately 2×. Finally, we show that overhead from virtualization is minimal, and our experimental results show two orders of magnitude increased speed as compared to microprocessor execution while keeping errors due to virtualization under 10%.
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