Steep-Slope and Hysteresis-Free MoS(2) Negative-Capacitance Transistors Using Single HfZrAlO Layer as Gate Dielectric.

Steep-Slope and Hysteresis-Free MoS(2) Negative-Capacitance Transistors Using Single HfZrAlO Layer as Gate Dielectric.
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DOI:
10.3390/nano12244352
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发表时间:
2022-12-07
期刊:
Nanomaterials (Basel, Switzerland)
影响因子:
--
通讯作者:
Xu J
Xu J
中科院分区:
其他
文献类型:
--
作者:
Tao X;Liu L;Xu J

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降低集成电路功耗的一种有效方法是在栅堆叠中引入负电容(NC)。通常,负电容场效应晶体管(NCFFET)同时使用负电容层和正电容层作为堆叠栅极,这不利于器件的缩小。在这项研究中,一个陡峭的斜率和无沟道的MoS 2 NCFET制造使用一个单一的Hf0.5-xZr0.5-xAl 2xOy(HZAO)层作为栅极介质。通过在Hf0.5Zr0.5O2(HZO)薄膜中引入多个Al原子,可以在HZAO薄膜中同时实现负电容和正电容,并且可以实现良好的电容匹配。这使得相关NCF晶体管具有出色的电气性能,包括22.3 mV/dec的低亚阈值摆幅,漏极电流幅度几乎为四个数量级,几乎无漏电流,以及9.4 × 106的高开/关电流比。因此,与传统的HZO/Al 2 O3堆叠栅极相比,使用单个HZAO层作为栅极电介质在制造高性能和低功耗NCFFET中具有显著的潜力。
An effective way to reduce the power consumption of an integrated circuit is to introduce negative capacitance (NC) into the gate stack. Usually, negative-capacitance field-effect transistors (NCFETs) use both a negative-capacitance layer and a positive-capacitance layer as the stack gate, which is not conductive to the scaling down of devices. In this study, a steep-slope and hysteresis-free MoS2 NCFET is fabricated using a single Hf0.5−xZr0.5−xAl2xOy (HZAO) layer as the gate dielectric. By incorporating several Al atoms into the Hf0.5Zr0.5O2 (HZO) thin film, negative capacitance and positive capacitance can be achieved simultaneously in the HZAO thin film and good capacitance matching can be achieved. This results in excellent electrical performance of the relevant NCFETs, including a low sub-threshold swing of 22.3 mV/dec over almost four orders of drain-current magnitude, almost hysteresis-free, and a high on/off current ratio of 9.4 × 106. Therefore, using a single HZAO layer as the gate dielectric has significant potential in the fabrication of high-performance and low-power dissipation NCFETs compared to conventional HZO/Al2O3 stack gates.
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