A binary-decision-diagram-based two-bit arithmetic logic unit on a GaAs-based regular nanowire network with hexagonal topology
A binary-decision-diagram-based two-bit arithmetic logic unit on a GaAs-based regular nanowire network with hexagonal topology
复制标题
六边形拓扑 GaAs 规则纳米线网络上基于二元决策图的两位算术逻辑单元
DOI：
10.1088/0957-4484/20/24/245203
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发表时间：
2009
期刊：
影响因子：
3.5
通讯作者：
T. Hashizume
中科院分区：
文献类型：
--
作者：
Hong;S. Kasai;Y. Shiratori;T. Hashizume
A two-bit arithmetic logic unit (ALU) was successfully fabricated on a GaAs-based regular nanowire network with hexagonal topology. This fundamental building block of central processing units can be implemented on a regular nanowire network structure with simple circuit architecture based on graphical representation of logic functions using a binary decision diagram and topology control of the graph. The four-instruction ALU was designed by integrating subgraphs representing each instruction, and the circuitry was implemented by transferring the logical graph structure to a GaAs-based nanowire network formed by electron beam lithography and wet chemical etching. A path switching function was implemented in nodes by Schottky wrap gate control of nanowires. The fabricated circuit integrating 32 node devices exhibits the correct output waveforms at room temperature allowing for threshold voltage variation.
DOI：
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发表时间：
2009
期刊：
International Journal of Nanotechnology and Molecular Computation VOL.1
影响因子：
--
作者：
S.F.B.A.Rahman;D.Nakata;Y.Shiratori;S.Kasai;S.Kasai
通讯作者：
S.Kasai
WPG 控制的 GaAs 六角纳米线网络上有源和时序电路的制造和表征
DOI：
--
发表时间：
2008
期刊：
影响因子：
--
作者：
H.-Q. Zhao;S. Kasai;T. Nakamura and T. Hashizume
通讯作者：
T. Nakamura and T. Hashizume
尺寸减小对 GaAs 基肖特基绕栅量子线晶体管开关特性的影响
DOI：
--
发表时间：
2008
期刊：
Japanese Journal of Applied Physics 47(In press)
影响因子：
--
作者：
白鳥悠太;アブドゥール ラーマンシャハリン ファズリ;葛西 誠也;Y. Shiratori and S. Kasai
通讯作者：
Y. Shiratori and S. Kasai