Combined In-Pixel Linear and Single-Photon Avalanche Diode Operation With Integrated Biasing for Wide-Dynamic-Range Optical Sensing

Combined In-Pixel Linear and Single-Photon Avalanche Diode Operation With Integrated Biasing for Wide-Dynamic-Range Optical Sensing
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像素内线性和单光子雪崩二极管操作与集成偏置相结合,实现宽动态范围光学传感

DOI:
10.1109/jssc.2019.2944856
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发表时间:
2020
影响因子:
5.4
通讯作者:
Johnston, Matthew L.
Johnston, Matthew L.
中科院分区:
工程技术1区
文献类型:
--
作者:
Ouh, Hyunkyu;Shen, Boyu;Johnston, Matthew L.

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本文提出了一种完全集成的,宽线性动态范围(DR)的光学传感器阵列结合线性和单光子雪崩二极管(SPAD)在每个像素内的操作。脉冲计数读出方案以面积有效的方式为两种操作模式提供像素内数字化,从而实现跨阵列的完全并行测量。所提出的双模式光学传感器阵列交替地需要用于光电二极管的反向偏置的高压(10-20 V)和低压电源(2-5 V),其由同一衬底中的可重构的闭环高压电荷泵提供。一个8 × 8阵列架构沿着的双模偏置发生器是在一个通用的180 nm CMOS工艺制造的,并证明129 dB的DR,同时保持线性光响应工作在20 Hz的双模帧速率。我们提出了一种像素设计方法,用于实现可扩展到阵列格式的双模光学传感器,以及在低电压CMOS工艺中的高电压DC-DC转换。
This article presents a fully integrated, wide linear dynamic range (DR) optical sensor array combining linear and single-photon avalanche diode (SPAD) operation within each pixel. A pulse-counting readout scheme provides in-pixel digitization in an area-efficient manner for both the operation modes, enabling fully parallel measurement across the array. The proposed dual-mode optical sensor array alternately requires high-voltage (10-20 V) and low-voltage supply (2-5 V) for reverse bias of the photodiodes, which is provided by a reconfigurable, closed-loop high-voltage charge pump in the same substrate. An 8 × 8 array architecture along with the dual-mode bias generator is fabricated in a general purpose 180-nm CMOS process and demonstrates 129-dB DR while maintaining linear photoresponse operating with a dual-mode frame rate of 20 Hz. We present a pixel design methodology for implementing a dual-mode optical sensor scalable to an array format, as well as high-voltage dc-dc conversion in a low-voltage CMOS process.
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