An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors
An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors
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针对 IBM POWER 多处理器的集成并发性和核心 ISA 架构包络定义以及测试预言机
DOI：
10.1145/2830772.2830775
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
Peter Sewell
中科院分区：
文献类型：
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作者：
Kathryn E. Gray;Gabriel Kerneis;Dominic P. Mulligan;Christopher Pulte;Susmit Sarkar;Peter Sewell
数十年来，诸如ARM和IBM权力等弱一致的多处理器已经存在了数十年，但是他们微妙的程序员可见的并发行为仍然具有挑战性，无论是实施还是使用；传统的建筑文档及其散文和伪代码的混合在一起，尚不清楚。在本文中，我们展示了如何定义此类架构的精确体系结构模型，以IBM Power为示例。我们的模型指定了一个任意测试程序，即其所有允许执行的集合，而不仅仅是某些特定实现的执行。该模型将操作并发模型与ISA模型集成在一起，用于固定点的非矢量用户模式指令集（很大程度上自动从供应商伪模式派生，并以新的ISA说明语言表示）。关键问题是这两者之间的接口：允许所有必需的并发行为，而不要过度承担某些特定的微构造实现，就需要一种新颖的抽象结构。我们的模型以数学上严格的语言表示，可以自动转化为可执行的测试 - 奥科克斯工具。这使人们可以交互探索或详尽地计算复杂的测试用例的所有允许行为集，以提供硬件和软件开发的参考。
Weakly consistent multiprocessors such as ARM and IBM POWER have been with us for decades, but their subtle programmer-visible concurrency behaviour remains challenging, both to implement and to use; the traditional architecture documentation, with its mix of prose and pseudocode, leaves much unclear. In this paper we show how a precise architectural envelope model for such architectures can be defined, taking IBM POWER as our example. Our model specifies, for an arbitrary test program, the set of all its allowable executions, not just those of some particular implementation. The model integrates an operational concurrency model with an ISA model for the fixed-point non-vector user-mode instruction set (largely automatically derived from the vendor pseudocode, and expressed in a new ISA description language). The key question is the interface between these two: allowing all the required concurrency behaviour, without over-committing to some particular microarchitectural implementation, requires a novel abstract structure. Our model is expressed in a mathematically rigorous language that can be automatically translated to an executable test-oracle tool; this lets one either interactively explore or exhaustively compute the set of all allowed behaviours of intricate test cases, to provide a reference for hardware and software development.
DOI：
10.1145/2837614.2837615
发表时间：
2016-01
期刊：
Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages
影响因子：
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作者：
Shaked Flur;Kathryn E. Gray;Christopher Pulte;Susmit Sarkar;A. Sezgin;Luc Maranget;Will Deacon;Peter Sewell
通讯作者：
Shaked Flur;Kathryn E. Gray;Christopher Pulte;Susmit Sarkar;A. Sezgin;Luc Maranget;Will Deacon;Peter Sewell
同步 C/C 和 POWER
DOI：
10.1145/2254064.2254102
发表时间：
2012
期刊：
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影响因子：
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作者：
Sarkar S
通讯作者：
Sarkar S
了解 POWER 多处理器
影响因子：
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作者：
Sarkar S
通讯作者：
Sarkar S