Evaluating the Security of eFPGA-based Redaction Algorithms
Evaluating the Security of eFPGA-based Redaction Algorithms
复制标题
评估基于 eFPGA 的编辑算法的安全性
DOI:
10.1145/3508352.3549425
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发表时间:
2022
期刊:
影响因子:
--
通讯作者:
Jordan Maynard
中科院分区:
文献类型:
--
作者:
Amin Rezaei;Raheel Afsharmazayejani;Jordan Maynard
Hardware IP owners must envision procedures to avoid piracy and overproduction of their designs under a fabless paradigm. A newly proposed technique to obfuscate critical components in a logic design is called eFPGA-based redaction, which replaces a sensitive sub-circuit with an embedded FPGA, and the eFPGA is configured to perform the same functionality as the missing sub-circuit. In this case, the configuration bitstream acts as a hidden key only known to the hardware IP owner. In this paper, we first evaluate the security promise of the existing eFPGA-based redaction algorithms as a preliminary study. Then, we break eFPGA-based redaction schemes by an initial but not necessarily efficient attack named DIP Exclusion that excludes problematic input patterns from checking in a brute-force manner. Finally, by combining cycle breaking and unrolling, we propose a novel and powerful attack called Break & Unroll that is able to recover the bitstream of state-of-the-art eFPGA-based redaction schemes in a relatively short time even with the existence of hard cycles and large size keys. This study reveals that the common perception that eFPGA-based redaction is by default secure against oracle-guided attacks, is prejudice. It also shows that additional research on how to systematically create an exponential number of non-combinational hard cycles is required to secure eFPGA-based redaction schemes.
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DOI:
--
发表时间:
2019
期刊:
DAC 2019
影响因子:
--
作者:
Kamali, Hadi Mardani;Zamiri Azar, Kimia;Homayoun, Houman;Sasan, Avesta
通讯作者:
Sasan, Avesta
DOI:
10.23919/date.2019.8714924
发表时间:
2019
期刊:
Testing in Europe (DATE
影响因子:
--
作者:
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通讯作者:
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DOI:
10.1109/iccad.2017.8203759
发表时间:
2017-11
期刊:
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
影响因子:
--
作者:
H. Zhou;Ruifeng Jiang;Shuyu Kong
通讯作者:
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DOI:
10.1109/tvlsi.2020.2968552
发表时间:
2020
期刊:
IEEE Transactions on Very Large Scale Integration (VLSI
影响因子:
--
作者:
Roshanisefat, Shervin;Mardani Kamali, Hadi;Homayoun, Houman;Sasan, Avesta
通讯作者:
Sasan, Avesta
DOI:
10.1109/aspdac.2018.8297317
发表时间:
2018
期刊:
Asia and South Pacific Design Automation Conference (ASP-DAC
影响因子:
--
作者:
Shen, Yuanqi;Rezaei, Amin;Zhou, Hai
通讯作者:
Zhou, Hai