Compiler-guided instruction-level clock scheduling for timing speculative processors

Compiler-guided instruction-level clock scheduling for timing speculative processors
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用于定时推测处理器的编译器引导指令级时钟调度

DOI:
10.1145/3195970.3196013
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发表时间:
2018
期刊:
Design Automation Conference
影响因子:
--
通讯作者:
Joseph, Russ
Joseph, Russ
中科院分区:
--
文献类型:
--
作者:
Fan, Yuanbo;Jia, Tianyu;Gu, Jie;Campanoni, Simone;Joseph, Russ

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尽管电路级时序推测对于在边际条件下实现操作具有重要的前景,但与恢复相关的开销被证明是一个严重的缺点。我们表明,细粒度的时钟调整指导的编译器可以用来拉伸和收缩的时钟,以最大限度地提高效益的时序投机和减少与恢复相关的开销。我们提出了一个公式编译器驱动的时钟调度,并探讨在几种情况下的好处。我们的研究结果表明,有显着的机会,利用定时松弛时,有适当的通道,编译器选择时钟周期在周期级别。
Despite the significant promise that circuit-level timing speculation has for enabling operation in marginal conditions, overheads associated with recovery prove to be a serious drawback. We show that fine-grained clock adjustment guided by the compiler can be used to stretch and shrink the clock to maximize benefits of timing speculation and reduce the overheads associated with recovery. We present a formulation for compiler-driven clock scheduling and explore the benefits in several scenarios. Our results show that there are significant opportunities to exploit timing slack when there are appropriate channels for the compiler to select clock period at cycle-level.
DOI: 10.1145/2897937.2898021
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