Managing Device Lifecycle: Reconfigurable Constrained Codes for M/T/Q/P-LC Flash Memories

Managing Device Lifecycle: Reconfigurable Constrained Codes for M/T/Q/P-LC Flash Memories
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管理设备生命周期:M/T/Q/P-LC 闪存的可重新配置约束代码

DOI:
10.1109/tit.2020.3032407
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发表时间:
2020
影响因子:
2.5
通讯作者:
Robert Calderbank
Robert Calderbank
中科院分区:
计算机科学2区
文献类型:
--
作者:
Ahmed Hareedy;Beyza Dabak;Robert Calderbank

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闪存设备正在赢得与磁记录设备的存储密度竞争。这一结果源于物理学的进步,允许每个单元存储超过一位,加上信号处理的进步,减少了物理不稳定性的影响。约束代码用于存储以避免有问题的模式,从而防止错误发生。最近,我们介绍了二进制对称字典序约束码(LOCO码)的数据存储和数据传输。LOCO代码是容量实现,简单,可以很容易地重新配置。本文介绍了简单的约束代码,支持非二进制物理门的多,三,四,和目前正在开发的五电平单元(M/T/Q/P-LC)闪存。如果有问题的模式随着时间的推移而改变,新的代码可以很容易地修改。这些代码旨在减轻单元间干扰,这是闪存设备中的关键错误来源。错误的发生是浮栅晶体管中和跨浮栅晶体管的寄生电容的结果,导致电荷从被编程到最高电荷电平的单元传播到被编程到较低电平或未编程/擦除的相邻单元。易出错模式的这种不对称性质使闪存与众不同。新的代码被称为<inline-formula><tex-math notation="LaTeX">$q$</tex-math></inline-formula>-ary非对称LOCO码(QA-LOCO码),和建设包括以前设计的单级单元(SLC)闪存设备(A-LOCO码)的代码。QA-LOCO码适用于每个单元具有任意数量(<inline-formula><tex-math notation="LaTeX">$q$</tex-math></inline-formula>)的电平的闪存器件。对于<inline-formula><tex-math notation="LaTeX">$q \geq 4$</tex-math></inline-formula>,我们证明了QA-LOCO码可以实现大于<inline-formula><tex-math notation="LaTeX">$0.95 \log _{2} \!每</tex-math></inline-formula>编码符号q$输入比特。编码和解码的复杂性是适度的,重新配置代码就像重新编程加法器一样容易。容量实现率、可负担的编码-解码复杂性和易于重新配置性支持M/T/Q/P-LC闪存器件的不断改进,以及生命周期管理,因为这些器件的特性随时间而变化,从而增加了它们的寿命。
Flash memory devices are winning the competition for storage density against magnetic recording devices. This outcome results from advances in physics that allow storage of more than one bit per cell, coupled with advances in signal processing that reduce the effect of physical instabilities. Constrained codes are used in storage to avoid problematic patterns, and thus prevent errors from happening. Recently, we introduced binary symmetric lexicographically-ordered constrained codes (LOCO codes) for data storage and data transmission. LOCO codes are capacity-achieving, simple, and can be easily reconfigured. This paper introduces simple constrained codes that support non-binary physical gates in multi, triple, quad, and the currently-in-development penta-level cell (M/T/Q/P-LC) Flash memories. The new codes can be easily modified if problematic patterns change with time. These codes are designed to mitigate inter-cell interference, which is a critical source of error in Flash devices. The occurrence of errors is a consequence of parasitic capacitances in and across floating-gate transistors, resulting in charge propagation from cells being programmed to the highest charge level to neighboring cells being programmed to lower levels or unprogrammed/erased. This asymmetric nature of error-prone patterns distinguishes Flash memories. The new codes are called <inline-formula> <tex-math notation="LaTeX">$q$ </tex-math></inline-formula>-ary asymmetric LOCO codes (QA-LOCO codes), and the construction subsumes codes previously designed for single-level cell (SLC) Flash devices (A-LOCO codes). QA-LOCO codes work for a Flash device with any number, <inline-formula> <tex-math notation="LaTeX">$q$ </tex-math></inline-formula>, of levels per cell. For <inline-formula> <tex-math notation="LaTeX">$q \geq 4$ </tex-math></inline-formula>, we show that QA-LOCO codes can achieve rates greater than <inline-formula> <tex-math notation="LaTeX">$0.95 \log _{2} \!q$ </tex-math></inline-formula> input bits per coded symbol. The complexity of encoding and decoding is modest, and reconfiguring a code is as easy as reprogramming an adder. Capacity-achieving rates, affordable encoding-decoding complexity, and ease of reconfigurability support the growing improvement of M/T/Q/P-LC Flash memory devices, as well as lifecycle management as the characteristics of these devices change with time, which increases their lifetime.
Q 元非对称 LOCO 代码:支持闪存演进的约束代码
DOI: 10.1109/isit44484.2020.9174176
发表时间: 2020
期刊: IEEE International Symposium on Information Theory (ISIT 2020
影响因子: --
作者:
Hareedy, Ahmed;Dabak, Beyza;Calderbank, Robert
通讯作者: Calderbank, Robert
LOCO 代码:按字典顺序排序的约束代码
DOI: 10.1109/tit.2019.2943244
发表时间: 2020
影响因子: 2.5
作者:
Hareedy, Ahmed;Calderbank, Robert
通讯作者: Calderbank, Robert
DOI: 10.1109/allerton.2019.8919932
发表时间: 2019
期刊: Control and Computing
影响因子: --
作者:
Hareedy, Ahmed;Calderbank, Robert
通讯作者: Calderbank, Robert