Advancing hardware security using polymorphic and stochastic spin-hall effect devices

Advancing hardware security using polymorphic and stochastic spin-hall effect devices
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使用多态和随机自旋霍尔效应器件提高硬件安全性

DOI:
10.23919/date.2018.8341986
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发表时间:
2018
期刊:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
影响因子:
--
通讯作者:
S. Rakheja
S. Rakheja
中科院分区:
--
文献类型:
--
作者:
Satwik Patnaik;N. Rangarajan;J. Knechtel;O. Sinanoglu;S. Rakheja

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近年来,保护电子电路的知识产权(IP)已成为一项严峻的挑战。逻辑锁定/加密和布局伪装是 IP 保护的两种重要技术。然而,大多数现有方法,特别是那些专注于 CMOS 集成的方法,由于需要额外的电路结构或器件级修改而导致过多的设计开销。这项工作利用了一种新兴的基于自旋的设备的固有多态性,称为巨型自旋霍尔效应(GSHE)开关,可以在单个实例中同时实现锁定和伪装。使用 GSHE 开关,我们提出了一个强大的原语,可以隐藏两个输入可能的所有 16 个布尔函数。我们使用最先进的布尔可满足性(SAT)攻击进行了一项全面的研究,以证明所提出的原语与文献中的其他几个相比具有卓越的弹性。当我们为确定性计算定制原语时,它可以轻松支持随机计算;我们认为随机行为可以打破大多数(如果不是全部)现有的 SAT 攻击。最后,我们讨论了原语针对各种旁路攻击以及运行时侵入式监控的恢复能力,这可以说比 SAT 攻击更令人担忧。
Protecting intellectual property (IP) in electronic circuits has become a serious challenge in recent years. Logic locking/encryption and layout camouflaging are two prominent techniques for IP protection. Most existing approaches, however, particularly those focused on CMOS integration, incur excessive design overheads resulting from their need for additional circuit structures or device-level modifications. This work leverages the innate polymorphism of an emerging spin-based device, called the giant spin-Hall effect (GSHE) switch, to simultaneously enable locking and camouflaging within a single instance. Using the GSHE switch, we propose a powerful primitive that enables cloaking all the 16 Boolean functions possible for two inputs. We conduct a comprehensive study using state-of-the-art Boolean satisfiability (SAT) attacks to demonstrate the superior resilience of the proposed primitive in comparison to several others in the literature. While we tailor the primitive for deterministic computation, it can readily support stochastic computation; we argue that stochastic behavior can break most, if not all, existing SAT attacks. Finally, we discuss the resilience of the primitive against various side-channel attacks as well as invasive monitoring at runtime, which are arguably even more concerning threats than SAT attacks.
探索对集成电路的攻击:挑战和研究机会
DOI: 10.1109/mdat.2017.2729398
发表时间: 2017
期刊: IEEE Design & Test
影响因子: 2
作者:
Wang, Huanyu;Forte, Domenic;Tehranipoor, Mark M.;Shi, Qihang
通讯作者: Shi, Qihang
DOI: 10.1145/3060403.3060469
发表时间: 2017-05
期刊: Proceedings of the Great Lakes Symposium on VLSI 2017
影响因子: --
作者:
Yuanqi Shen;H. Zhou
通讯作者: Yuanqi Shen;H. Zhou