Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration
Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration
复制标题
使用动态部分重配置的 Genode OS 中的硬件加速
DOI:
10.1007/978-3-319-77610-1_21
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发表时间:
2018
期刊:
影响因子:
--
通讯作者:
H. Michalik
中科院分区:
文献类型:
--
作者:
A. Dörflinger;M. Albers;B. Fiethe;H. Michalik
Algorithms with operations on large regular data structures such as image processing can be highly accelerated when executed as hardware tasks in an FPGA fabric. The Dynamic Partial Reconfiguration (DPR) feature of new SRAM-based FPGA families allows a dynamic swapping and replacement of hardware tasks during runtime. Particularly embedded systems with processing chains that change over time or that are too large to be implemented in an FPGA fabric in parallel, benefit from DPR. In this paper we present a complete framework for hardware acceleration using DPR in the microkernel based Genode OS. This makes the DPR feature available not only for the high-performance computing field, but also for safety-critical applications. The new framework is evaluated for an exemplary imaging application running on a Xilinx Zynq-7000 SoC.
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DOI:
10.1109/ahs.2017.8046355
发表时间:
2017-07
期刊:
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
影响因子:
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作者:
A. Dörflinger;B. Fiethe;H. Michalik;S. Fekete;Phillip Keldenich;Christian Scheffer
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DOI:
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期刊:
2012 International Conference on Field-Programmable Technology
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期刊:
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通讯作者:
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DOI:
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发表时间:
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期刊:
2015 IEEE International Parallel and Distributed Processing Symposium Workshop
影响因子:
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通讯作者:
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DOI:
--
发表时间:
2015
期刊:
SIGBED
影响因子:
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作者:
Tian Xia;Jean;F. Nouvel
通讯作者:
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