XOR-Based Low-Cost Reconfigurable PUFs for IoT Security

XOR-Based Low-Cost Reconfigurable PUFs for IoT Security
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用于物联网安全的基于 XOR 的低成本可重配置 PUF

DOI:
10.1145/3274666
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发表时间:
2019-04
影响因子:
2
通讯作者:
Fabrizio Lombardi
Fabrizio Lombardi
中科院分区:
计算机科学3区
文献类型:
--
作者:
Weiqiang Liu;Lei Zhang;Zhengran Zhang;Chongyan Gu;Chenghua Wang;Maire O'Neill;Fabrizio Lombardi

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随着物联网(IoT)的快速发展,安全性引起了人们的极大兴趣。基于经典密码学为互联网提出的传统安全解决方案不能应用于物联网节点,因为它们通常是资源受限的。物理不可克隆函数(PUF)是基于硬件的安全原语,并且可以用于在线生成密钥或通过使用所谓的挑战-响应对(CRP)提取其内部随机差异来唯一地识别集成电路(IC)。它被认为是物联网安全的一种有前途的低成本解决方案。逻辑可重构PUF(RPUF)在硬件成本方面是高效的。本文首先提出了一种新的RPUF分类,即基于电路的RPUF(C-RPUF)和基于算法的RPUF(A-RPUF);提出了两种基于异或(XOR)的RPUF电路:基于XOR的可重构环形振荡器PUF(XRBR PUF)和基于XOR的可重构环形振荡器PUF(XRRO PUF)。XRBR和XRRO PUF均在Xilinx Spartan-6现场可编程门阵列(FPGA)上实现。实现结果与以前的PUF设计相比,表现出良好的唯一性和可靠性。与传统的PUF设计相比,所提出的设计的最显著的优点是,它们在硬件成本方面是高效的。此外,与以前的RPUF相比,XRRO PUF是最有效的设计。此外,所提出的XRRO和XRBR PUF两者分别仅需要先前位稳定环形PUF和可重配置RO PUF的硬件资源的12.5%来生成1位响应。这证实了所提出的XRBR和XRRO PUF是具有良好的唯一性和可靠性的非常有效的设计。
With the rapid development of the Internet of Things (IoT), security has attracted considerable interest. Conventional security solutions that have been proposed for the Internet based on classical cryptography cannot be applied to IoT nodes as they are typically resource-constrained. A physical unclonable function (PUF) is a hardware-based security primitive and can be used to generate a key online or uniquely identify an integrated circuit (IC) by extracting its internal random differences using so-called challenge-response pairs (CRPs). It is regarded as a promising low-cost solution for IoT security. A logic reconfigurable PUF (RPUF) is highly efficient in terms of hardware cost. This article first presents a new classification for RPUFs, namely circuit-based RPUF (C-RPUF) and algorithm-based RPUF (A-RPUF); two Exclusive OR (XOR)-based RPUF circuits (an XOR-based reconfigurable bistable ring PUF (XRBR PUF) and an XOR-based reconfigurable ring oscillator PUF (XRRO PUF)) are proposed. Both the XRBR and XRRO PUFs are implemented on Xilinx Spartan-6 field-programmable gate arrays (FPGAs). The implementation results are compared with previous PUF designs and show good uniqueness and reliability. Compared to conventional PUF designs, the most significant advantage of the proposed designs is that they are highly efficient in terms of hardware cost. Moreover, the XRRO PUF is the most efficient design when compared with previous RPUFs. Also, both the proposed XRRO and XRBR PUFs require only 12.5% of the hardware resources of previous bitstable ring PUFs and reconfigurable RO PUFs, respectively, to generate a 1-bit response. This confirms that the proposed XRBR and XRRO PUFs are very efficient designs with good uniqueness and reliability.
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