Algorithmic Aspects of VLSI

本研究研究了与VLSI芯片和晶圆设计相关的许多算法问题。最重要的问题是处理器容错阵列的有效设计问题。其次是如何使穷举测试方法在超大规模集成电路自测中可行的问题。第三个持续关注的领域是多层电路的实现，其注意力从抽象的布局理论问题转移到cad算法问题。一个令人感兴趣的新领域包括“硅编译”问题的算法方面（相对于面向系统的）。所有这些主题涵盖的问题范围从抽象的数学问题到具体的工程问题。其目的是在这个从抽象到具体的范围内处理几个点上的问题。

This research studies a number of algorithmic issues related to the design of VLSI chips and wafers. The foremost interest is the problem of the efficient design of fault-tolerant arrays of processors. Next in priority is the problem of how to render feasible the exhaustive test approach to VLSI self-test. A third continuing area of concern is multilayer circuit realizations, where the attention is shifting from abstract layout-theoretic issues to CAD-algorithmic ones. A new area of interest includes algorithmic (in contrast to systems-oriented) aspects of the "silicon compilation" problem. All of these topics encompass problems ranging from abstract mathematical questions to concrete engineering issues. The intent is to tackle the problems at several points along this abstract-to-concrete spectrum.