Integrated Circuit Timing Simulation

集成电路时序仿真

• 批准号: 8714493
• 负责人: Ronald Rohrer
• 金额: $ 24.8万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1988
• 资助国家: 美国
• 起止时间: 1988-01-01 至 1991-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8714493&HistoricalAwards=false
• 关键词: Integrated; Circuit; Timing; Simulation

The research focuses on type of circuit timing simulation, which can do variable accuracy analysis (at the discretion of the user). This approach to timing simulation has potential to provide design engineers with faster and more accurate simulation of circuit design. The research is on-going work on an integrated circuit timing simulator prototype called SPEC82. This prototype simulator is tree/link based, event-driven and uses charge and energy conserving table models for device characterization. It has shown encouraging results in speed and accuracy of simulation. Research is in improving capabilities of SPEC82 through accommodation of more devices, generalized macro- modeling, spread time-constant control, and adaptive error control. Benchmark tests will be run on the improved SPEC82 simulator.

本文研究了电路时序仿真的类型， 可以进行可变精度分析（由 用户）。 这种时序模拟方法有可能 为设计工程师提供更快、更准确的仿真 的电路设计。 这项研究正在进行中， 集成电路时序模拟器原型，称为SPEC 82。 该原型模拟器是基于树/链接的、事件驱动的， 为设备使用充电和节能表模型 特征化 它在速度方面取得了令人鼓舞的成果， 模拟的准确性。 研究是为了提高 SPEC 82通过容纳更多的设备，广义宏， 建模、扩展时间常数控制和自适应误差 控制 将在改进后的SPEC 82上进行基准测试 模拟器