A Proposal for Investigating Multicube: A Large Scale, Multiprocessor Cache-Coherent Shared-Memory

点击翻译按钮获取中文摘要

Although there is much interest in shared memory multiprocessors, and there are now successful commercial products for multis, scaling to large numbers of powerful processors poses difficult problems. Most approaches either introduce geographical locality to the user or limit the notion of shared memory by supporting caches that may become inconsistent. Multicube is a recently proposed architecture that provides hardware-guaranteed cache consistency, introduces no geographical locality, and may scale to large numbers of processors. The goal of this research project is to study the Multicube approach to building scalable, large-scale shared-memory multiprocessors. The multicube architecture is based on shared buses, multilevel caches, and cache consistency protocols. A novel set of synchronization primitives has been proposed as an extension to the cache consistency protocol. The project encompasses the study of memory reference and synchronization behavior of existing parallel programs, scalability issues, bus implementation issues, the implications of clustering of processors, I/O, particularly swapping and virtual memory, and a variety of other architectural issues for the system.