Investigation of Large-Scale, Cache-Coherent Shared-Memory Multiprocessing

这项研究建立在以前对共享记忆的研究基础上 使用IEEE提出的可扩展一致性的多处理器 界面作为研究平台。 多处理器问题是 从逻辑层次和该高速缓存一致性两个方面进行了研究 水平 逻辑层面的重要问题包括研究 单个SCI环以及多个 环，流水线网络的属性，以及适当的 拓扑，用于将简单环连接在一起， 大型系统。 该高速缓存的重要问题 一致性级别包括对共享存储器的增强 模型来提供有效的同步，扩展到 SCI一致性协议和放松事件的好处 存储器系统中的排序约束。

This research builds on previous studies of shared-memory multiprocessors by using the IEEE proposed Scalable Coherent Interface as a research platform. Multiprocessor issues are studied both at the logical level and the cache coherence level. Important problems at the logical level include study of the performance of a single SCI ring as well as multiple rings, the properties of pipelined networks, and appropriate topologies for connecting simple rings together to create large-scale systems. Important problems at the cache coherence level include enhancements to the shared-memory model to provide for efficient synchronization, extensions to the SCI coherence protocol and the benefit of relaxing event ordering constraints in the memory system.