RIA: Design Conceptualization for High Level Synthesis of Hardware
RIA: Design Conceptualization for High Level Synthesis of Hardware
批准号:
9009239
负责人:
Nikil Dutt
金额:
$7.5万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1990
资助国家:
美国
项目状态:
已结题
起止时间:
1990-07-01 至 1993-06-30
中文摘要
Dutt 本研究是一个集成电路和系统设计的框架,它使用混合媒体的方法,以帮助工程师在建模设计的高层次综合。 设计工具是建立在图形输入语言和表格中间表示之上的。 该表示使用通用设计模型,其中包括同步和异步行为、时序约束以及通信设计之间的协议。 具体的研究任务是:1. 一个高层次的综合环境,为设计概念化和捕获提供了多种输入媒体; 将部分设计的结构和用户绑定包含到环境中; 3. 支持高级综合和仿真的VHDL设计描述建模指南。 该补助金为少数民族研究生提供支持。
英文摘要
Dutt This research is on a framework for IC circuit and system design, which uses a mixed media approach to aid engineers in modeling designs for high level synthesis. Design tools are being built on top of a graphical input language and a tabular intermediate representation. The representation uses a general design model that includes synchronous and asynchronous behavior, timing constraints and protocols between communicating designs. Specific research tasks are: 1. An environment for high level synthesis which provides multiple input media for design conceptualization and capture; 2. Inclusion of partially designed structures and user bindings into the environment; 3. Modeling guidelines for design description in VHDL which support high level synthesis and simulation. This supplement provides support for a minority graduate student.
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