Cache Memories and CPU Performance Architecture

高速缓存存储器和 CPU 性能架构

• 批准号: 9116578
• 负责人: Alan Smith
• 金额: $ 37.83万
• 依托单位: University of California-Berkeley
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1992
• 资助国家: 美国
• 起止时间: 1992-02-15 至 1997-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9116578&HistoricalAwards=false
• 关键词: Cache; Memories; CPU; Performance; Architecture

Smith In the area of cache memories and CPU performance architecture the research efforts are directed at three items: 1. A study of the behavior of vector workloads and the extent to which vector machines can be expected to benefit from the use of cache memories. Iinitial results suggest that cache memories would work well. 2. A study of cache consistency in multiprocessors. Current research is directed at analyzing some multiprocessor traces in order to understand sharing behavior, and to evaluate the relative performance of a number of multiprocessor cache consistency algorithms. The project is generating further traces and study the effect of changes in the source code on sharing behavior. 3. The mMeasurement of the memory systems of a number of machines to determine the effect that those memory systems have on overall system performance.

史密斯在缓存记忆和CPU性能体系结构领域的研究工作针对三个项目：1。对向量工作负载的行为以及预期可以从使用缓存记忆中受益的矢量机器的研究。 iInitial结果表明，缓存记忆会很好地工作。 2。多处理器中的缓存一致性的研究。 当前的研究旨在分析一些多处理器痕迹以了解共享行为，并评估许多多处理器高速缓存一致性算法的相对性能。 该项目正在生成进一步的跟踪，并研究源代码变化对共享行为的影响。 3。许多机器的内存系统的MMESEREMENT，以确定这些内存系统对整体系统性能的影响。