Flexible, Seamless Optimization for High-Performance Processors

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This project investigates the design and implementation of algorithms for generating highly optimized code for current and future processors. Of particular interest are processors used in embedded applications. To fully exploit the power of this type of processor requires compilers that use sophisticated algorithms for performing register allocation, instruction scheduling, global data flow analysis, data dependency analysis, and processor-specific optimizations. This research investigates how these optimizations and others interact, and use this knowledge to develop and implement new optimization algorithms that operate seamlessly and cooperate to produce very high-quality code. The starting point for the research is an existing retargetable optimizer that has been used to build compilers for a wide array of architectures, including both general-purpose architectures and specialized architectures used in signal-processing and real-time systems. Its organization is particularly well-suited to exploring the implementation and evaluation of cooperative optimization algorithms for high-performance processors.