VLSI Design-for-Test Laboratory
VLSI Design-for-Test Laboratory
批准号:
9351026
负责人:
Prawat Nagvajara
金额:
$1.68万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1993
资助国家:
美国
项目状态:
已结题
起止时间:
1993-06-01 至 1995-11-30
中文摘要
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英文摘要
A VLSI laboratory and design courses are being developed for the electrical and computer engineering curriculum. These courses provide students with experience in the development of VLSI-chip products. In this setting, students form teams and undertake the whole design process: logic design, gate-level, layout-level, simulation/verification, test generation, and testing of the returned prototype chips. The proposed courses emphasize the importance of quality in the IC products, particularly testing. Students adopt the concept of concurrent engineering early in their studies of the design and testing techniques, and problems that arise in the manufacturing and mass production of the ICs are considered and solved. Design- for-test techniques are studied and their actual implementation, which makes the IC-chip products easy to test, are carried out by the design teams.The items requested comprise a benchtop ASIC tester and logic verification and test generation CAD software, which are essential for the implementation of Design-for-Test laboratory courses.
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CISE Research Instrumentation: VLSI Design for Test Instrumentation
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批准号:9222957
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项目类别:Standard Grant
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资助金额:$3.23万
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财政年份:1993
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负责人:Prawat Nagvajara
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依托单位:
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