An 8-Bit Superconducting Analog-to-Digital Converter with 10 GHz Input Bandwidth
An 8-Bit Superconducting Analog-to-Digital Converter with 10 GHz Input Bandwidth
批准号:
9360224
负责人:
Paul Bradley
金额:
$6.48万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1994
资助国家:
美国
项目状态:
已结题
起止时间:
1994-03-15 至 1995-02-28
中文摘要
9360224 Bradley HYPRES已经证明,在4 GHz输入带宽下,6位A/D的分辨率约为5位,在7 GHz输入带宽时,分辨率约为4位。输入带宽约为10 GHz(3db点)。然而,在GHz频率下,分辨率受到与输入信号转换速率成正比的阈值的动态失真的限制。模拟了一种新的比较器设计,其中这些失真在很大程度上被对称性抵消。模拟表明,如果使用适当的结构,A/D的孔径时间将提高一个数量级(在高频下分辨率增加约3位)。在第一阶段,HYPRES打算制造和测试这种设计,以验证在单个比较器级别上的这种水平的性能。第二阶段将包括全8位A/D的设计、制造和测试。*
英文摘要
9360224 Bradley HYPRES has demonstrated a 6-bit A/D capable of about 5 bits of resolution at 4GHz input bandwidth and about 4 bits of resolution at 7GHz input bandwidth. The input bandwidth is about 10GHz (the 3db point). However, the resolution at GHz frequencies has been limited by dynamic distortion in the thresholds proportional to the input signal slew rate. A new comparator design has been simulated in which these distortions are largely cancelled by symmetry. Simulations indicate an order of magnitude improvement in the aperture time of the A/D if the proper architecture is used (about 3 more bits of resolution at high frequencies). In Phase I, HYPRES intends to fabricate and test this design of verify this level of performance at the single comparator level. Phase II would cover design, fabrication and testing of the full 8-bit A/D. ***
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