RIA: Improving Cache Performance in Scientific Applications

这个项目探索了自动重组代码的方法，以提高科学应用程序的高速缓存的性能。具体地说，该项目对以下技术进行了实验研究：(1)在包括高速缓存性能和浮点计算对执行速度的影响的新性能度量的指导下进行循环优化；(2)通过使用编译器生成的关于未来引用模式的知识来增强高速缓存线替换算法；以及(3)指令调度器使用编译器生成的高速缓存命中和未命中信息来隐藏具有非阻塞高速缓存的体系结构上的延迟。这些方法中的每一种都在实验性编译器中实现，并在先进的微处理器上进行评估。该项目的成功代表着朝着实现全自动存储器层次管理迈出的重要一步。

This project explores approaches for automatically restructuring code to improve the performance of cache memories for scientific applications. Specifically, the project examines experimentally the following techniques: (1) loop optimization guided by a new performance metric that includes the effects of cache performance and floating-point computation on execution speed, (2) the enhancement of cache line replacement algorithms by using compiler generated knowledge of future reference patterns, and (3) the use of compiler generated cache hit and miss information by the instruction scheduler to hide latency on architectures having non-blocking caches. Each of these methods is implemented in an experimental compiler and evaluated on advanced microprocessors. The success of the project represents a significant step towards achieving fully automatic memory hierarchy management.