RIA: Improving Cache Performance in Scientific Applications

本项目探索自动重构代码的方法，以提高科学应用的缓存内存的性能。具体来说，该项目通过实验检验了以下技术：(1)由一种新的性能指标指导的循环优化，该指标包括缓存性能和浮点计算对执行速度的影响；(2)通过使用编译器生成的未来参考模式知识来增强缓存线替换算法；(3)指令调度器使用编译器生成的缓存命中和未命中信息来隐藏具有非阻塞缓存的架构上的延迟。每种方法都在实验编译器中实现，并在高级微处理器上进行了评估。该项目的成功代表了实现全自动内存层次管理的重要一步。

This project explores approaches for automatically restructuring code to improve the performance of cache memories for scientific applications. Specifically, the project examines experimentally the following techniques: (1) loop optimization guided by a new performance metric that includes the effects of cache performance and floating-point computation on execution speed, (2) the enhancement of cache line replacement algorithms by using compiler generated knowledge of future reference patterns, and (3) the use of compiler generated cache hit and miss information by the instruction scheduler to hide latency on architectures having non-blocking caches. Each of these methods is implemented in an experimental compiler and evaluated on advanced microprocessors. The success of the project represents a significant step towards achieving fully automatic memory hierarchy management.