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High-Level Optimization for DSP Architectures

DSP 架构的高级优化

基本信息

批准号：
0209036
负责人：
Steven Carr
金额：
$ 25万
依托单位：
Michigan Technological University
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2002
资助国家：
美国
起止时间：
2002-09-01 至 2006-08-31
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=0209036&HistoricalAwards=false
关键词：
Level Optimization DSP Architectures

项目摘要

Embedded systems require maximum performance from a processor withinsignificant constraints in power consumption and chip cost. Usingsoftware pipelining, high-performance digital signal processors canoften exploit considerable instruction-level parallelism (ILP), andthus significantly improve performance. However, software pipeliningsometimes fails to utilize the processor efficiently and may hinderthe goals of low power consumption and chip cost.The problems with software pipelining can be ameliorated by usingadvanced compiler loop transformation techniques. However, currentmethods for applying loop transformations are lacking. Metrics forapplying loop transformations do not model high-performance digitalsignal processing (DSP) architectures and the effects of softwarepipelining effectively. This research will address the above problems by developingand experimentally validating the following:1) A performance metric that accurately models software-pipelinedloop performance on high-performance DSP architectures. 2) A prediction of the register pressure of a software-pipelinedloop before high-level loop transformations are applied.As a result of this research, more ILP will be exploited in DSPapplications, resulting in an increase in performance and a savings inthe overall energy required to execute an application. Improvements inperformance and energy usage will allow better and morecomputationally expensive algorithms to be used in embedded systems.

嵌入式系统需要处理器的最大性能，而功耗和芯片成本方面的限制微不足道。使用软件流水线，高性能数字信号处理器通常可以利用相当大的指令级并行性（ILP），从而显着提高性能。然而，软件流水线有时不能有效地利用处理器，并可能阻碍低功耗和芯片成本的目标。使用高级编译器循环转换技术可以改善软件流水线的问题。然而，目前缺乏应用循环转换的方法。应用环路变换的度量不能有效地模拟高性能数字信号处理（DSP）架构和软件流水线的影响。本研究将通过开发和实验验证以下内容来解决上述问题：1)在高性能DSP架构上准确模拟软件管道环路性能的性能指标。2)在应用高级循环变换之前对软件管道循环的寄存器压力进行预测。这项研究的结果是，更多的ILP将在dsp应用程序中得到利用，从而提高性能并节省执行应用程序所需的总体能源。性能和能源使用的改进将允许在嵌入式系统中使用更好、计算成本更高的算法。