Systematic Integration of Fault Tolerance in High Performance Parallel Programs

在这项研究计划拨款中，首席研究员将在系统容错设计领域制定研究计划。该研究是基于逐步放松的系统不变断言在处理器故障的存在下的想法。当没有故障时，将建立强断言，系统将以最高性能运行。当处理器发生故障时，确保较弱的断言，并且系统可以以降低的性能操作。在规划期间，将开发实现多服务器系统中的容错的多不变断言方法的算法。成功完成将导致研究的扩展，以允许更广泛的故障类别，以及由多个服务器系统支持的更复杂的交易的技术。

In this Research Planning Grant, the PI will develop a research plan in the area of systematic fault-tolerant design. The research is based on the idea to progressively relax the system invariant assertion in the presence of processor failures. When there are no failures, a strong assertion will be established and the system will operate at peak performance. As processors fail, weaker assertions are ensured, and the system may operate at a reduced performance. During the planning period algorithms to implement the multiple invariant assertions approach to fault- tolerance in multiple server systems will be developed. A successful completion will lead to an expansion of the research to permit a wider class of failures, as well as techniques for more complex transactions supported by the multiple server systems.