Development of an Undergraduate VLSI Test Laboratory for Digital, Analog and Mixed-Signal Circuits
数字、模拟和混合信号电路本科 VLSI 测试实验室的开发
基本信息
- 批准号:9650672
- 负责人:
- 金额:$ 3.9万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:1996
- 资助国家:美国
- 起止时间:1996-07-01 至 1999-06-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The purpose of this project is the development of an undergraduate VLSI laboratory for testing digital, analog, and mixed-signal circuits. The lab includes an integrated test platform based on a CMT Mixed-Signal Test Station and a high-speed oscilloscope. The laboratory is intended to supplement two existing undergraduate courses, Introduction to VLSI Electronics and VLSI Testing, and to provide much needed hands-on experience for the undergraduate students. This process will enable the undergraduate students to take a mixed-signal VLSI circuit design from initial specifications to a working implementation. The skyrocketing demands for mixed-signal technology in telecommunication, high-performance computing, and automotive electronics have necessitated the introduction of this technology at the undergraduate level. Rapid prototyping with the help of automated design and test tools is perceived as the most appropriate method of providing the students with a clear concept of the various steps in the design, debugging, and evaluation of a typical VLSI system. A new course focusing on the advanced design issues of analog and mixed-signal circuits in VLSI is to be offered, fully utilizing the new laboratory. The upgrading of the existing courses provides the ABET-recommended major meaningful design experience (MMDE) in the VLSI track of the undergraduate curriculum. This new laboratory is expected to have a direct impact on about two-thirds of the undergraduate ECE students. The project's practical experiences can enhance the job opportunities for the students in leading industries, where such skills are of great value.
该项目的目的是开发一个本科生 VLSI 实验室,用于测试数字、模拟和混合信号电路。该实验室包括一个基于 CMT 混合信号测试站和高速示波器的集成测试平台。该实验室旨在补充现有的两门本科课程,即《超大规模集成电路导论》和《超大规模集成电路测试》,并为本科生提供急需的实践经验。这个过程将使本科生能够进行混合信号 VLSI 电路设计,从最初的规范到工作实现。 电信、高性能计算和汽车电子领域对混合信号技术的需求不断增长,因此有必要在本科阶段引入该技术。借助自动化设计和测试工具进行快速原型设计被认为是为学生提供典型 VLSI 系统的设计、调试和评估各个步骤的清晰概念的最合适方法。 将充分利用新实验室,开设一门新课程,重点关注超大规模集成电路中模拟和混合信号电路的高级设计问题。现有课程的升级在本科课程的VLSI轨道中提供了ABET推荐的主要有意义的设计经验(MMDE)。这个新实验室预计将对大约三分之二的 ECE 本科生产生直接影响。该项目的实践经验可以增加学生在主导行业的就业机会,这些技能在这些行业具有重要价值。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Ramalingam Sridhar其他文献
Defect Analysis and Defect Tolerant Design of Multi-port SRAMs
- DOI:
10.1007/s10836-007-5023-5 - 发表时间:
2008-01-17 - 期刊:
- 影响因子:1.300
- 作者:
Lushan Liu;Pradeep Nagaraj;Shambhu Upadhyaya;Ramalingam Sridhar - 通讯作者:
Ramalingam Sridhar
Ramalingam Sridhar的其他文献
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{{ truncateString('Ramalingam Sridhar', 18)}}的其他基金
RIA: High-Performance VLSI Systems Using CMOS Wave- Pipelined Transmission Gate Logic
RIA:使用 CMOS 波流水线传输门逻辑的高性能 VLSI 系统
- 批准号:
9409762 - 财政年份:1994
- 资助金额:
$ 3.9万 - 项目类别:
Standard Grant
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