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SBIR Phase I: Chemical Vapor Deposition (CVD) of Copper Alloys from Bimetallic, Single Source Precursors

SBIR Phase I: Chemical Vapor Deposition (CVD) of Copper Alloys from Bimetallic, Single Source Precursors
SBIR 第一阶段:采用双金属、单一来源前驱体化学气相沉积 (CVD) 铜合金
批准号:
9660730
负责人:
Thomas Baum
金额:
$7.5万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1997
资助国家:
美国
项目状态:
已结题
起止时间:
1997-01-01 至 1997-06-30

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中文摘要
翻译
*96-60730 Baum这个第一阶段小型企业创新研究项目将通过双金属、单源前体的热分解,实现铜(铜)和铜合金薄膜的化学气相沉积(CVD)。合成、表征和优化了一类新型的双金属单源铜(1)(13-二酮)配合物,用于CVD生长掺杂铜膜(合金)。包含第二金属中心的Lewis碱和13-二酮配体的特性都将被改变,以便为沉积高纯铜合金薄膜“量身定做”前体属性。将对铜配合物进行研究,以关联结构-性质关系和对CVD的用途。利用这种方法,共形掺杂铜膜可以被开发为集成电路中的高性能互连。用于沉积铜合金的CVD金属化工艺将为形成高性能集成电路提供机制。使用低电阻率互连,与低介电常数材料相结合,提供了一条实现卓越器件性能的途径。此外,铜合金可以显著提高亚微米级互连线的电迁移和热稳定性。在第二阶段,将利用与一家主要集成电路制造商和CVD工具供应商的合作来评估互连工艺的商业潜力。这项第一阶段的研究将促进高性能逻辑和存储器件的制造。第三阶段的全球商业化预计将影响一个相当大的市场。
英文摘要
*** 96-60730 Baum This Phase I Small Business Innovation Research project will achieve chemical vapor deposition (CVD) of copper (Cu) and copper-alloy films via thermal decomposition of bimetallic, single source precursors. A novel class of bimetallic single source Cu(1)(13-diketonato) complexes will be synthesized, characterized and optimized for CVD film growth of doped copper films (alloys). Both the Lewis base, which contains the second metal center, and 13-diketonate ligand identity will be altered to "tailor" the precursor properties for the deposition of high-purity copper alloy films. The copper complexes will be studied to correlate structure -property relationships and utility for CVD. Using this approach, conformal, doped Cu films can be explored as high-performance interconnects in integrated circuits. A CVD metallization process for the deposition of copper alloys will provide a mechanism for the formation of high performance integrated circuits. Using low resistivity interconnects, in tandem with low dielectric constant materials, provides a pathway to superior device performance. Further, copper alloys can dramatically improve both the electromigration and thermal stability of the submicron sized interconnects. In Phase II, collaboration with a major IC manufacturer and CVD tool vendor will be used to evaluate the commercial potential of the interconnect process. This Phase I research will facilitate fabrication of high performance logic and memory devices. World-wide commercialization in Phase III is expected to impact a sizeable market.
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