SBIR PHASE II: Interfacial Engineering for Advanced Solid State Electronic Devices

SBIR 第二阶段：先进固态电子器件的界面工程

• 批准号: 9710408
• 负责人: Matthew Hooker
• 金额: $ 30万
• 依托单位: Nanomaterials Research LLC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1998
• 资助国家: 美国
• 起止时间: 1998-01-15 至 1999-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9710408&HistoricalAwards=false
• 关键词: SBIR; PHASE; II; Interfacial; Engineering

This Small Business Innovation Research Phase II project will develop, optimize, and qualify significantly better varistors by the engineering of interfaces. The need for better varistors originates from the fact that almost all electronic devices are subject to noise and high voltage surges from integrated circuits(IC)integration, switching or electrostatic discharge. These surges and noises can severely affect the performance of electrical and electronic devices. The Phase I effort demonstrated a technology that can help meet the current and near-term performance needs from varistors. The proof-of-concept varistors featured higher non-linear coefficient, lower leakage current, and higher critical electric field values while simultaneously being miniaturizable. The Phase I results also helped attract venture capital interest. Phase II now seeks to develop, optimize and held test file varistors. The optimized product will be the basis lot commercialization. Nanostrtictured varistors have significant commercial potential for pulse and surge suppression and voltage stabilization in low and high voltage circuits as well as for noise reduction in communications and computer systems.

这个小型企业创新研究第二阶段项目将通过接口工程开发、优化和鉴定明显更好的压敏电阻。 对更好压敏电阻的需求源于这样一个事实：几乎所有电子设备都会受到集成电路 (IC) 集成、开关或静电放电产生的噪声和高压浪涌的影响。 这些浪涌和噪声会严重影响电气和电子设备的性能。 第一阶段的工作展示了一种可以帮助满足压敏电阻当前和近期性能需求的技术。 概念验证压敏电阻具有更高的非线性系数、更低的漏电流和更高的临界电场值，同时可小型化。 第一阶段的结果也有助于吸引风险投资的兴趣。 第二阶段现在寻求开发、优化和举行测试文件压敏电阻。 优化后的产品将成为商业化的基础批次。 纳米结构压敏电阻在低压和高压电路中的脉冲和浪涌抑制以及电压稳定以及通信和计算机系统中的降噪方面具有巨大的商业潜力。