CISE Research Instrumentation: Infrastructure to Support Accurate Performance Measurements of Multithreaded Programs

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9729889 Cohen, William E. Kavi, Krishna The University of Alabama at Huntsville CISE Research Instrumentation: Infrastructure to Support Accurate Performance Measurements of Multithreaded Programs This research instrumentation enables the following research projects: - Pre-Load/Post-Store (PL/PS) architecture, - Fine-grained scheduling of multithreaded applications, and - Performance evaluation of the Java language. To support the aforementioned projects, the University of Alabama at Huntsville (UAH) will purchase a 4-processor SMP system and data logging hardware (NIST MultiKron II instrumentation board) which will provide an environment for experimental research in Computer and Information Science and Engineering. The system's low-overhead hardware/software instrumentation enables accurate performance measurements of multithreaded software and multithreaded architectures without resorting to slow, often intrusive, software simulation techniques. Research topics supported by this instrumentation include the evaluation of the Pre-Load/Post-Store (PL/PS) architecture, the comparison of adaptive and static fine-grained task scheduling techniques, and the examination of runtime performance of multithreaded Java programs. The PL/PS architecture breaks each task in a program into three phases: load, compute, and store. Separating the phases of each task allows greater flexiblity in scheduling the code and provides a means of hiding memory and communication latencies. Detailed simulators and compiler optimizations are being developed for the architecture. The fine-grained scheduling examines the overhead introduced on contemporary hardware/software environments by the various scheduling techniques applied to suites of real-world problems. The Java performance evaluation investigates the viability of Java as a programming language for high-performance computing and identifies features in the languages that limit performance. A better understanding of these topics will lead to techniques to improve the performance of multithreaded programs and architectures.