CAREER: Value and Memory Access Profiling for Compiler Optimization

在几个编译器研究领域，概要反馈优化已经被证明可以提高程序性能。用于指导大多数这些优化的主要概要信息是基本块和控制流边缘频率。这实际上只是可以收集并用于编译器优化的配置文件信息的一小部分。该建议关注概要反馈优化的两个相对较新的领域。第一个区域将研究收集值配置文件，它跟踪执行过程中发现的指令和变量的最高值。然后，该信息用于指导基于值的代码专门化，这可以显著减少执行指令的数量。第二个分析区域处理内存访问配置文件。内存访问配置文件将用于指导一个新的优化过程，称为缓存感知数据放置，以及指导推测指令调度。缓存相关的数据放置使用临时关系内存配置文件在编译时确定在缓存中放置堆栈、全局、堆和常量对象的位置。这可能会导致数据缓存丢失率的显著降低。除了从这些优化中获得性能优势之外，本研究还将研究收集概要信息的快速有效方法。

Profile feedback optimizations have been shown to improve program performance for several compiler research areas. The main profiling information used to guide most of these optimizations are basic block and control flow edge frequencies. This is actually only a small fraction of the profile information that could be gathered and used for compiler optimizations. This proposal focuses on two relatively new areas of profile feedback optimizations. The first area will investigate gathering value profiles, which keep track of the top values for instructions and variables found during execution. This information is then used to guide value-based code specialization, which can significantly reduce the number of executed instructions. The second profiling area deals with memory access profiles. Memory access profiles will be used to guide a new optimization procedure called Cache-Conscious Data Placement, as well as to guide speculative instruction scheduling. Cache-conscious data placement uses a temporal relationship memory profile to determine at compile- time where to place stack, global, heap, and constant objects in the cache. This can potentially result in a significant reduction in the data cache miss rate. In addition to the performance benefits from these optimizations, this research will investigate fast and efficient approaches for gathering the profile information.