CAREER: Software Synthesis for Real-time Signal Processing Systems

数字信号处理(DSP)系统设计者面临的一个主要挑战是获得足够有效和可预测的软件实现的复杂性迅速增加。在面向消费者的应用领域，如无线通信和PC多媒体，极具竞争力的上市时间压力以及不断升级的应用和处理器体系结构要求公司在软件开发方面维持巨大的人力资源支出。同样，在非常高性能的应用中，如雷达信号处理，以有效利用大规模多处理器计算机系统的方式划分程序和管理处理器间通信仍然是一个巨大的挑战。在过去的几年里，人们已经广泛认识到数据流是计算机辅助DSP系统设计工具的一种有吸引力的编程模型。该项目正在研究自动或交互地将用于DSP的高级数据流程序映射到高效软件实现的算法。具体地说，这项研究正在探索(1)数据流编程和命令式编程格式的彻底集成，以及用于编译数据流的技术与用于编译命令式语言的现有技术的有效集成；(2)开发用于将数据流模型映射到多处理器体系结构上的实现的自动和交互软件工具，重点是高效地管理调度、处理器间通信和同步之间的交互；以及(3)开发用于将数据流计算模型编译为单处理器实现的算法，其方式是优化程序和数据存储需求、单个子程序的调用开销和延迟。

A major challenge facing designers for digital signal processing (DSP) systems is the rapidly increasing complexity of deriving sufficiently efficient and predictable software implementations. In consumer-oriented application domains such as wireless communications and PC multimedia, extremely competitive time-to- market pressure together with the continually escalating complexity of applications and processor architectures require companies to sustain enormous human resource expenditures for software development. Similarly, in very high performance applications such as radar signal processing, it remains a significant challenge to partition programs and manage interprocessor communication in a manner that effectively exploits large-scale multiprocessor computer systems. Over the past several years, it has become widely recognized that dataflow is an attractive programming model for computer-aided DSP system design tools. This project is investigating algorithms that automatically or interactively map high-level, dataflow programs for DSP into efficient software implementations. Specifically, this research is exploring (1) a thorough integration of dataflow programming and imperative programming formats, and an efficient integration of techniques for compiling dataflow with the existing techniques for compiling imperative languages; (2) the development of automatic and interactive software tools for mapping dataflow models into implementations on multiprocessor architectures, with emphasis on efficiently managing the interactions between scheduling, interprocessor communication, and synchronization; and (3) the development of algorithms for compiling dataflow computations models into uniprocessor implementations in such a way that program and data memory requirements, invocation overhead of individual subprograms, and latency are optimized.