SBIR Phase I: Automated Design-Rule Generator for Optimal Electronic Chip Manufacture

这个小企业创新研究第一阶段项目的目标是建立一个自动化设计规则生成器的可行性，以优化最先进的电子芯片设计的可制造性。最近光刻技术的发展增强了对这种工具的需求，这表明有可能可靠地构建具有非常小特征尺寸的芯片。为了实现所提出的研究目标，将需要开发一个数据库环境，该数据库环境可以编码与分层CAD设计相一致的芯片上特征的几何相似性。对数据库进行分析，以派生等效类，在此基础上概括从原型研究中获得的规则，无论这些规则是启发式的、实验性的还是基于模型的。在第一阶段，这种方法的可行性将通过应用于原型设计来证明。该工具将极大地扩展芯片重新设计软件的现有市场，因为它将允许快速，经济有效的全芯片重新设计和优化，以提高制造成品率。据估计，目前这种新产品的市场规模为2000万美元，并以每年20-30%的速度增长。

This Small Business Innovation Research Phase I project's goal is to establish the feasibility of an automated design rule generator to optimize the manufacturability of state-of-the-art electronic chip designs. The need for this tool is enhanced by recent developments in lithography, which suggest that it may be possible to reliably build chips with very small feature sizes. To achieve the goals of the proposed research will require the development of a database environment that encodes geometric similarity of features on chips consistent with hierarchical CAD designs. An analysis of the database to derive equivalency classes on which to generalize rules obtained from prototype studies, whether they be heuristic, experimental, or model-based. In Phase I, the feasibility of this approach will be demonstrated through application to prototypical designs. This tool will greatly expand the existing market for chip redesign software because it will allow fast, cost effective full chip redesign and optimization to enhance manufacturing yield. The market for this new product is estimated to be $20 million today and grow at the rate of 20-30% per year.