Integrated Laboratory for Design and Testing of Digital Circuits Based on Reconfigurable Hardware

基于可重构硬件的数字电路设计与测试综合实验室

• 批准号: 9950577
• 负责人: Krzysztof Gaj
• 金额: $ 5.97万
• 依托单位: George Mason University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-06-01 至 2002-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9950577&HistoricalAwards=false
• 关键词: Integrated; Laboratory; Design; Testing; Digital

This project implements a lab for the design and testing of digital circuits to be the cornerstone for a new computer engineering curriculum. The lab is based upon reconfigurable hardware, Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), and a complete suite of Computer-Aided Design (CAD) tools. The choice of this set of elements for the lab and the related courses is based upon the adaptation of innovative and successful programs developed at other institutions as reflected in recent literature about computer engineering education.Reprogrammable logic is chosen because of its short design cycle, reusability of components, and cost effectiveness. It allows students to focus on the design process itself, avoid or easily correct design errors, handle relatively large and complex circuits, and learn skills and tools they will use as professionals. It is also relatively easy for an instructor to manage such a learning environment and permits the same circuitry and equipment to be used in several laboratory and project based courses. The important pedagogical aspects of this project are an early exposure of students to digital design, the comprehensive integration of digital design throughout the curriculum, and an integrated treatment of testing and design. The expected outcome of this project is the production of well-qualified computer engineers prepared to enter the local industry. This outcome is being evaluated by an advisory committee with representatives from the local semi-conductor industry, based upon student retention and graduation rates, alumni feedback, and feedback from local industry managers.

该项目实现了数字电路的设计和测试实验室，成为新的计算机工程课程的基石。该实验室基于可重构硬件、现场可编程门阵列（FPGA）、复杂可编程逻辑器件（CPLD）和一整套计算机辅助设计（CAD）工具。 选择这套实验和相关课程的元素是基于改编的创新和成功的计划，在其他机构发展，反映在最近的文献有关计算机工程教育。选择可重编程逻辑，因为它的设计周期短，组件的可重用性，和成本效益。 它允许学生专注于设计过程本身，避免或轻松纠正设计错误，处理相对较大和复杂的电路，并学习他们将作为专业人士使用的技能和工具。 对于教师来说，管理这样的学习环境也相对容易，并且允许在几个实验室和基于项目的课程中使用相同的电路和设备。 该项目的重要教学方面是学生早期接触数字设计，数字设计在整个课程中的全面整合，以及测试和设计的综合处理。该项目的预期成果是培养出准备进入当地工业的合格计算机工程师。 这一结果正在由一个咨询委员会评估，该委员会由当地半导体行业的代表组成，基于学生保留率和毕业率，校友反馈以及当地行业经理的反馈。