CAREER: Incorporating Technology Scaling into the Design, Evaluation, and Implementation of Computer Architectures

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ABSTRACTPROPOSAL NUMBER: 9984336TITLE: Incorporating Technology Scaling into the Design, Evaluation, and Implementation of Computer ArchitecturesPI: Stephen W. Keckler, University of Texas at Austin The objectives for the research funded by this CAREER proposal are to investigate computer architectures that simultaneously address the challenges of deep-submicron technologies and meet the needs of modern dynamic applications. The most significant technology challenges are the diverging speeds of transistors and wires, increased power consumption and heat generation in integrated circuits, and higher susceptibility to transient logic faults due to decreasing feature sizes.This research includes three components. First, accurate technology models for future silicon fabrication technologies are developed. The focus is on communication delay, both along wires and within microarchitecture structures such as register files and ALUs and on the reliability of microprocessor components when subjected to external energy sources. Second, these models are incorporated into the SimpleScalar toolset to evaluate existing architectures under these new technological constraints and provide a platform for evaluating future architectures. Third, multiple processor cores on a chip are investigated as a means to construct a "server-on-a-chip" and to build a system that tolerates transient faults. The necessary features of this multicore architecture are hardware and system software that dynamically schedule jobs to meet latency, throughput, and redundancy (for reliability) requirements of the workloads.